PIC16C71X
SUBWF
Syntax:
Subtract W from f
SWAPF
Syntax:
Swap Nibbles in f
[ label ] SWAPF f,d
[ label ]
SUBWF f,d
Operands:
0 ≤ f ≤ 127
Operands:
0 ≤ f ≤ 127
d
[0,1]
d
[0,1]
Operation:
(f<3:0>) → (dest<7:4>),
(f<7:4>) → (dest<3:0>)
Operation:
(f) - (W) → (dest)
Status Affected: C, DC, Z
Status Affected:
Encoding:
None
Encoding:
00
0010
dfff
ffff
00
1110
dfff
ffff
Subtract (2’s complement method) W reg-
ister from register 'f'. If 'd' is 0 the result is
stored in the W register. If 'd' is 1 the
result is stored back in register 'f'.
Description:
The upper and lower nibbles of regis-
ter 'f' are exchanged. If 'd' is 0 the
result is placed in W register. If 'd' is 1
the result is placed in register 'f'.
Description:
Words:
1
1
Words:
1
1
Cycles:
Cycles:
Q Cycle Activity:
Q1
Q2
Q3
Q4
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register 'f'
Process
data
Write to
dest
Decode
Read
register 'f'
Process Write to
data dest
Example 1:
SUBWF
REG1,1
SWAPF REG,
0
Example
Before Instruction
Before Instruction
REG1
REG1
=
=
=
=
3
2
?
?
W
C
Z
=
0xA5
After Instruction
REG1
W
=
=
0xA5
0x5A
After Instruction
REG1
=
1
2
W
C
Z
=
=
=
1; result is positive
0
Example 2:
Before Instruction
TRIS
Load TRIS Register
REG1
=
=
=
=
2
2
?
?
Syntax:
[label] TRIS
f
W
C
Z
Operands:
Operation:
5 ≤ f ≤ 7
(W) → TRIS register f;
Status Affected: None
After Instruction
00
Encoding:
0000 0110
0fff
REG1
=
0
W
C
Z
=
=
=
2
The instruction is supported for code
compatibility with the PIC16C5X prod-
ucts. Since TRIS registers are read-
able and writable, the user can directly
address them.
Description:
1; result is zero
1
Example 3:
Before Instruction
REG1
=
=
=
=
1
2
?
?
Words:
Cycles:
Example
1
1
W
C
Z
After Instruction
To maintain upward compatibility
with future PIC16CXX products, do
not use this instruction.
REG1
=
0xFF
2
0; result is negative
0
W
C
Z
=
=
=
1997 Microchip Technology Inc.
DS30272A-page 83
MICROCHIP [ MICROCHIP ]
