PIC16C71X
CLRF
Clear f
CLRW
Clear W
Syntax:
[label] CLRF
0 ≤ f ≤ 127
f
Syntax:
[ label ] CLRW
None
Operands:
Operation:
Operands:
Operation:
00h → (f)
1 → Z
00h → (W)
1 → Z
Status Affected:
Encoding:
Z
Status Affected:
Encoding:
Z
00
0001
1fff
ffff
00
0001
0xxx
xxxx
The contents of register 'f' are cleared
and the Z bit is set.
Description:
W register is cleared. Zero bit (Z) is
set.
Description:
Words:
1
1
Words:
1
1
Cycles:
Cycles:
Q Cycle Activity:
Q1
Q2
Q3
Q4
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register
'f'
Process
data
Write
register 'f'
Decode
NOP
Process
data
Write to
W
CLRW
Example
CLRF
FLAG_REG
Example
Before Instruction
Before Instruction
FLAG_REG
After Instruction
W
=
0x5A
=
0x5A
After Instruction
W
=
0x00
1
FLAG_REG
Z
=
=
0x00
1
Z
=
CLRWDT
Syntax:
Clear Watchdog Timer
[ label ] CLRWDT
None
Operands:
Operation:
00h → WDT
0 → WDT prescaler,
1 → TO
1 → PD
Status Affected:
Encoding:
TO, PD
00
0000
0110
0100
CLRWDTinstruction resets the Watch-
dog Timer. It also resets the prescaler
of the WDT. Status bits TO and PD
are set.
Description:
Words:
1
1
Cycles:
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
NOP
Process
data
Clear
WDT
Counter
CLRWDT
Example
Before Instruction
After Instruction
WDT counter
=
=
?
WDT counter
0x00
WDT prescaler=
0
1
1
TO
PD
=
=
DS30272A-page 74
1997 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
