PIC16C63A/65B/73B/74B
TABLE 9-4:
Address
0Bh,8Bh
0Ch
0Dh
8Ch
8Dh
87h
0Eh
0Fh
10h
15h
16h
17h
1Bh
1Ch
1Dh
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, AND TIMER1
Bit 7
GIE
PSPIF
(1)
—
PSPIE
(1)
—
Name
INTCON
PIR1
PIR2
PIE1
PIE2
TRISC
TMR1L
TMR1H
T1CON
CCPR1L
CCPR1H
CCP1CON
CCPR2L
CCPR2H
CCP2CON
Bit 6
PEIE
ADIF
(2)
—
ADIE
(2)
—
Bit 5
T0IE
RCIF
—
RCIE
—
Bit 4
INTE
TXIF
—
TXIE
—
Bit 3
RBIE
SSPIF
—
SSPIE
—
Bit 2
T0IF
CCP1IF
—
CCP1IE
—
Bit 1
INTF
TMR2IF
—
TMR2IE
—
Bit 0
RBIF
TMR1IF
CCP2IF
TMR1IE
CCP2IE
Value on:
POR,
BOR
0000 000x
0000 0000
---- ---0
0000 0000
---- ---0
1111 1111
xxxx xxxx
xxxx xxxx
Value on
all other
RESETS
0000 000u
0000 0000
---- ---0
0000 0000
---- ---0
1111 1111
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
--00 0000
uuuu uuuu
uuuu uuuu
--00 0000
PORTC Data Direction register
Holding register for the Least Significant Byte of the 16-bit TMR1 register
Holding register for the Most Significant Byte of the 16-bit TMR1 register
—
—
T1CKPS1
T1CKPS0
T1OSCEN
T1SYNC
TMR1CS
TMR1ON
--00 0000
xxxx xxxx
xxxx xxxx
Capture/Compare/PWM register1 (LSB)
Capture/Compare/PWM register1 (MSB)
—
—
CCP1X
CCP1Y
CCP1M3
CCP1M2
CCP1M1
CCP1M0
--00 0000
xxxx xxxx
xxxx xxxx
Capture/Compare/PWM register2 (LSB)
Capture/Compare/PWM register2 (MSB)
—
—
CCP2X
CCP2Y
CCP2M3
CCP2M2
CCP2M1
CCP2M0
--00 0000
Legend:
x
= unknown,
u
= unchanged, - = unimplemented, read as ’0’. Shaded cells are not used by Capture and Timer1.
Note 1:
The PSP is not implemented on the PIC16C63A/73B; always maintain these bits clear.
2:
The A/D is not implemented on the PIC16C63A/65B; always maintain these bits clear.
TABLE 9-5:
Address
0Bh,8Bh
0Ch
0Dh
8Ch
8Dh
87h
11h
92h
12h
15h
16h
17h
1Bh
1Ch
1Dh
Legend:
Note 1:
2:
Name
INTCON
PIR1
PIR2
PIE1
PIE2
TRISC
TMR2
PR2
T2CON
CCPR1L
CCPR1H
REGISTERS ASSOCIATED WITH PWM AND TIMER2
Bit 7
GIE
PSPIF
(1)
—
PSPIE
(1)
—
Bit 6
PEIE
ADIF
(2)
—
ADIE
(2)
—
Bit 5
T0IE
RCIF
—
RCIE
—
Bit 4
INTE
TXIF
—
TXIE
—
Bit 3
RBIE
SSPIF
—
SSPIE
—
Bit 2
T0IF
CCP1IF
—
CCP1IE
—
Bit 1
INTF
TMR2IF
—
TMR2IE
—
Bit 0
RBIF
TMR1IF
CCP2IF
TMR1IE
CCP2IE
Value on:
POR,
BOR
0000 000x
0000 0000
---- ---0
0000 0000
---- ---0
1111 1111
0000 0000
1111 1111
Value on
all other
RESETS
0000 000u
0000 0000
---- ---0
0000 0000
---- ---0
1111 1111
0000 0000
1111 1111
-000 0000
uuuu uuuu
uuuu uuuu
--00 0000
uuuu uuuu
uuuu uuuu
--00 0000
PORTC Data Direction register
Timer2 Module’s register
Timer2 Module’s Period register
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0
TMR2ON
T2CKPS1
T2CKPS0
-000 0000
xxxx xxxx
xxxx xxxx
Capture/Compare/PWM register1 (LSB)
Capture/Compare/PWM register1 (MSB)
—
—
CCP1X
CCP1Y
CCP1M3
CCP1M2
CCP1M1
CCP1M0
CCP1CON
CCPR2L
CCPR2H
CCP2CON
--00 0000
xxxx xxxx
xxxx xxxx
Capture/Compare/PWM register2 (LSB)
Capture/Compare/PWM register2 (MSB)
—
—
CCP2X
CCP2Y
CCP2M3
CCP2M2
CCP2M1
CCP2M0
--00 0000
x
= unknown,
u
= unchanged, - = unimplemented, read as '0'. Shaded cells are not used by PWM and Timer2.
Bits PSPIE and PSPIF are reserved on the PIC16C63A/73B; always maintain these bits clear.
Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear.
DS30605C-page 54
2000 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
