PIC16C63A/65B/73B/74B
4.5
Indirect Addressing, INDF and
FSR Registers
EXAMPLE 4-2:
movlw
movwf
clrf
incf
btfss
goto
:
INDIRECT ADDRESSING
0x20
FSR
INDF
FSR,F
FSR,4
NEXT
;initialize pointer
;to RAM
;clear INDF register
;inc pointer
;all done?
;no clear next
;yes continue
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF reg-
ister. Any instruction using the INDF register actually
accesses the register pointed to by the File Select Reg-
ister, FSR. Reading the INDF register itself indirectly
(FSR = ’0’) will read 00h. Writing to the INDF register
indirectly results in a no-operation (although status bits
may be affected). An effective 9-bit address is obtained
by concatenating the 8-bit FSR register and the IRP bit
(STATUS<7>), as shown in Figure 4-4.
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 4-2.
NEXT
CONTINUE
Note:
Maintain the IRP and RP1 bits clear.
FIGURE 4-4:
DIRECT/INDIRECT ADDRESSING
Direct Addressing
Indirect Addressing
0
IRP
0
location select
00
00h
01
80h
10
100h
11
180h
bank select
location select
7
FSR register
0
RP1:RP0
0
bank select
6
from opcode
not used
Data
Memory
7Fh
FFh
17Fh
1FFh
Bank 0
Bank 1
Bank 2
Bank 3
Note 1:
For register file map detail, see Figure 4-2.
2:
Shaded portions are not implemented; maintain the IRP and RP1 bits clear.
2000 Microchip Technology Inc.
DS30605C-page 27
MICROCHIP [ MICROCHIP TECHNOLOGY ]
