PIC16F872
REGISTER 10-2: ADCON1 REGISTER (ADDRESS 9Fh)
U-0
ADFM
bit7
U-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
—
—
—
PCFG3
PCFG2
PCFG1
PCFG0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
bit0
- n = Value at POR reset
bit 7:
ADFM: A/D Result format select
1= Right Justified. 6 most significant bits of ADRESH are read as ‘0’.
0= Left Justified. 6 least significant bits of ADRESL are read as ‘0’.
bit 6-4: Unimplemented: Read as '0'
bit 3-0: PCFG<3:0>: A/D Port Configuration Control bits
AN4
RA5
AN3
RA3
AN2
RA2
AN1
RA1
AN0
RA0
CHAN /
(1)
PCFG<3:0>
VREF+
VREF-
Refs
0000
0001
0010
0011
0100
0101
011x
1000
1001
1010
1011
1100
1101
1110
1111
A
A
A
A
D
D
D
A
A
A
A
A
D
D
D
A
A
A
A
A
A
A
A
A
D
A
A
A
A
A
A
D
D
A
A
A
A
A
A
D
A
A
A
A
A
A
A
A
VDD
RA3
VDD
RA3
VDD
RA3
VDD
RA3
VDD
RA3
RA3
RA3
RA3
VDD
RA3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RA2
VSS
VSS
RA2
RA2
RA2
VSS
RA2
5/0
4/1
5/0
4/1
3/0
2/1
0/0
3/2
5/0
4/1
3/2
3/2
2/2
1/0
1/2
VREF+
A
A
VREF+
A
A
D
VREF+
D
D
D
VREF+
A
VREF-
A
VREF+
VREF+
VREF+
VREF+
D
A
VREF-
VREF-
VREF-
D
VREF+
VREF-
A = Analog input
D = Digital I/O
Note 1: This column indicates the number of analog channels available as A/D inputs and the number of analog channels
used as voltage reference inputs.
DS30221A-page 86
Preliminary
1999 Microchip Technology Inc.