PIC16F872
SPI Module
Slave Mode ................................................................ 59
R
R/W ....................................................................................54
R/W bit ...............................................................................62
R/W bit ...............................................................................63
Read/Write bit, R/W ...........................................................54
Receive Enable bit .............................................................56
Receive Overflow Indicator bit, SSPOV .............................55
Register File .........................................................................7
Register File Map .................................................................8
Registers
FSR Summary ...........................................................11
INDF Summary ..........................................................11
INTCON Summary .....................................................11
OPTION Summary .....................................................11
PCL Summary ............................................................11
PCLATH Summary ....................................................11
PORTB Summary ......................................................11
SSPSTAT ...................................................................54
STATUS Summary ....................................................11
Summary ......................................................................9
TMR0 Summary .........................................................11
TRISB Summary ........................................................11
Reset ............................................................................ 95, 99
Block Diagram ............................................................99
Reset Conditions for All Registers ...........................102
Reset Conditions for PCON Register .......................101
Reset Conditions for Program Counter ....................101
Reset Conditions for STATUS Register ...................101
Restart Condition Enabled bit ............................................56
Revision History ...............................................................149
SS ...................................................................................... 57
SSP .................................................................................... 53
Block Diagram (SPI Mode) ........................................ 57
RA5/SS/AN4 Pin .......................................................... 6
RC3/SCK/SCL Pin ....................................................... 6
RC4/SDI/SDA Pin ........................................................ 6
RC5/SDO Pin ............................................................... 6
SPI Mode ................................................................... 57
SSPADD .................................................................... 62
SSPBUF .............................................................. 58, 62
SSPCON1 ................................................................. 55
SSPCON2 ................................................................. 56
SSPSR ................................................................ 58, 62
SSPSTAT ............................................................ 54, 62
2
SSP I C
2
SSP I C Operation .................................................... 61
SSP Module
SPI Master Mode ....................................................... 58
SPI Slave Mode ......................................................... 59
SSPCON1 Register ................................................... 61
SSP Overflow Detect bit, SSPOV ...................................... 62
SSPADD Register ........................................................ 10, 11
SSPBUF ...................................................................... 11, 62
SSPBUF Register ................................................................ 9
SSPCON Register ............................................................... 9
SSPCON1 .................................................................... 55, 61
SSPCON2 .......................................................................... 56
SSPEN ............................................................................... 55
SSPIF .......................................................................... 16, 63
SSPM3:SSPM0 ................................................................. 55
SSPOV .................................................................. 55, 62, 73
SSPSTAT .............................................................. 11, 54, 62
SSPSTAT Register ............................................................ 10
Stack .................................................................................. 20
Overflows ................................................................... 20
Underflow .................................................................. 20
Start bit (S) ......................................................................... 54
Start Condition Enabled bit ................................................ 56
STATUS Register ........................................................ 11, 12
C Bit ........................................................................... 12
DC Bit ........................................................................ 12
IRP Bit ....................................................................... 12
PD Bit .................................................................. 12, 99
RP1:RP0 Bits ............................................................. 12
TO Bit .................................................................. 12, 99
Z Bit ........................................................................... 12
Stop bit (P) ......................................................................... 54
Stop Condition Enable bit .................................................. 56
Synchronous Serial Port .................................................... 53
Synchronous Serial Port Enable bit, SSPEN ..................... 55
Synchronous Serial Port Interrupt ...................................... 16
Synchronous Serial Port Mode Select bits,
S
S (Start bit) .........................................................................54
SCK ....................................................................................57
SCL ....................................................................................62
SDA ....................................................................................62
SDI .....................................................................................57
SDO ...................................................................................57
SEEVAL Evaluation and Programming System ............122
Serial Clock, SCK ...............................................................57
Serial Clock, SCL ...............................................................62
Serial Data Address, SDA ..................................................62
Serial Data In, SDI .............................................................57
Serial Data Out, SDO .........................................................57
Slave Select, SS ................................................................57
SLEEP .................................................................. 95, 99, 108
SMP ...................................................................................54
Software Simulator (MPLAB-SIM) ....................................120
Special Features of the CPU ..............................................95
Special Function Registers ..................................................9
Speed, Operating .................................................................1
SPI
Master Mode ..............................................................58
Master Mode Timing ..................................................58
Serial Clock ................................................................57
Serial Data In .............................................................57
Serial Data Out ..........................................................57
Serial Peripheral Interface (SPI) ................................53
Slave Mode Timing ....................................................59
Slave Mode Timing Diagram ......................................59
Slave Select ...............................................................57
SPI clock ....................................................................58
SPI Mode ...................................................................57
SPI Clock Edge Select, CKE ..............................................54
SPI Data Input Sample Phase Select, SMP .......................54
SSPM3:SSPM0 ................................................................. 55
T
T1CKPS0 bit ...................................................................... 41
T1CKPS1 bit ...................................................................... 41
T1CON ............................................................................... 11
T1CON Register .......................................................... 11, 41
T1OSCEN bit ..................................................................... 41
T1SYNC bit ........................................................................ 41
T2CKPS0 bit ...................................................................... 45
T2CKPS1 bit ...................................................................... 45
T2CON Register .......................................................... 11, 45
DS30221A-page 154
1999 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
