PIC16CE62X
FIGURE 13-3: CLKOUT AND I/O TIMING
Q1
Q2
Q3
Q4
OSC1
11
10
22
23
CLKOUT
13
14
12
16
18
19
I/O Pin
(input)
15
17
I/O Pin
new value
old value
(output)
20, 21
Note: All tests must be do with specified capacitance loads (Figure 13-1) 50 pF on I/O pins and CLKOUT
TABLE 13-5: CLKOUT AND I/O TIMING REQUIREMENTS
Parameter # Sym
Characteristic
Min
Typ†
75
75
35
35
—
Max
Units
ns
(1)
10*
11*
12*
13*
14*
15*
16*
TosH2ckL
—
200
OSC1↑ to CLKOUT↓
OSC1↑ to CLKOUT↑
(1)
TosH2ckH
TckR
—
ns
200
100
(1)
—
ns
CLKOUT rise time
CLKOUT fall time
(1)
TckF
—
100
20
—
ns
(1)
TckL2ioV
TioV2ckH
TckH2ioI
—
ns
CLKOUT ↓ to Port out valid
Port in valid before CLKOUT ↑
(1)
(1)
Tosc +200 ns
0
—
ns
—
—
ns
Port in hold after CLKOUT ↑
17*
18*
TosH2ioV
TosH2ioI
OSC1↑ (Q1 cycle) to Port out valid
—
50
—
150
—
ns
ns
OSC1↑ (Q2 cycle) to Port input invalid (I/O in hold
100
time)
19*
20*
21*
22*
23
TioV2osH
TioR
Port input valid to OSC1↑ (I/O in setup time)
Port output rise time
0
—
—
10
10
—
—
—
40
40
—
—
ns
ns
ns
ns
ns
TioF
Port output fall time
—
Tinp
RB0/INT pin high or low time
RB<7:4> change interrupt high or low time
25
TCY
Trbp
*
†
These parameters are characterized but not tested
Data in "Typ" column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
Note 1: Measurements are taken in RC Mode where CLKOUT output is 4 x TOSC
1998 Microchip Technology Inc.
Preliminary
DS40182A-page 89
MICROCHIP [ MICROCHIP ]
