PIC16CE62X
13.4
Timing Diagrams and Specifications
FIGURE 13-2: EXTERNAL CLOCK TIMING
Q4
Q3
Q4
4
Q1
Q1
Q2
OSC1
1
3
3
4
2
CLKOUT
TABLE 13-4: EXTERNAL CLOCK TIMING REQUIREMENTS
Parameter Sym Characteristic
No.
Min
Typ†
Max
Units Conditions
Fos External CLKIN Frequency
DC
DC
DC
DC
0.1
1
—
—
4
20
MHz XT and RC osc mode, VDD=5.0V
MHz HS osc mode
(Note 1)
—
200
4
kHz LP osc mode
Oscillator Frequency
(Note 1)
—
MHz RC osc mode, VDD=5.0V
MHz XT osc mode
—
4
—
20
MHz HS osc mode
DC
250
50
–
200
—
kHz LP osc mode
1
Tosc External CLKIN Period
—
ns
ns
µs
ns
ns
ns
µs
µs
ns
µs
ns
XT and RC osc mode
HS osc mode
(Note 1)
—
—
5
—
—
LP osc mode
Oscillator Period
(Note 1)
250
250
50
—
—
RC osc mode
—
10,000
1,000
—
XT osc mode
—
HS osc mode
5
—
LP osc mode
2
TCY
Instruction Cycle Time (Note 1)
1.0
100*
2*
Fosc/4
—
DC
—
TCYS=FOSC/4
3*
TosL, External Clock in (OSC1) High or
TosH Low Time
XT oscillator, TOSC L/H duty cycle
LP oscillator, TOSC L/H duty cycle
—
—
20*
—
—
HS oscillator, TOSC L/H duty
cycle
4*
TosR, External Clock in (OSC1) Rise or
TosF Fall Time
25*
50*
15*
—
—
—
—
—
—
ns
ns
ns
XT oscillator
LP oscillator
HS oscillator
*
These parameters are characterized but not tested.
†
Data in "Typ" column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: Instruction cycle period (TCY) equals four times the input oscillator time-base period. All specified values are
based on characterization data for that particular oscillator type under standard operating conditions with the
device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or
higher than expected current consumption. All devices are tested to operate at "min." values with an exter-
nal clock applied to the OSC1 pin.
When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices.
DS40182A-page 88
Preliminary
1998 Microchip Technology Inc.