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PIC16CE625-04/P 参数 Datasheet PDF下载

PIC16CE625-04/P图片预览
型号: PIC16CE625-04/P
PDF下载: 下载PDF文件 查看货源
内容描述: OTP 8位CMOS微控制器与EEPROM数据存储器 [OTP 8-Bit CMOS MCU with EEPROM Data Memory]
分类和应用: 存储微控制器和处理器外围集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 108 页 / 2330 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16CE62X  
The code for these functions is not yet determined, but  
will be available on our web site (www.microchip.com)  
when it is completed. The code will be accessed by  
either including the source code FLASH62X.INC or by  
linking FLASH62X.ASM.  
6.0  
EEPROM PERIPHERAL  
OPERATION  
The PIC16CE623/624/625 each have 128 bytes of  
EEPROM data memory. The EEPROM data memory  
supports a bi-directional 2-wire bus and data transmis-  
sion protocol. These two-wires are serial data (SDA)  
and serial clock (SCL), that are mapped to bit1 and bit2,  
respectively, of the EEINTF register (SFR 90h). In  
addition, the power to the EEPROM can be controlled  
using bit0 (EEVDD) of the EEINTF register. For most  
applications, all that is required is calls to the following  
functions:  
6.0.1  
SERIAL DATA  
SDA is a bi-directional pin used to transfer addresses  
and data into and data out of the memory.  
For normal data transfer SDA is allowed to change only  
during SCL low. Changes during SCL high are  
reserved for indicating the START and STOP condi-  
tions.  
; Byte_Write: Byte write routine  
;
;
;
Inputs:EEPROM Address  
EEPROM Data  
EEADDR  
EEDATA  
6.0.2  
SERIAL CLOCK  
Outputs:  
Return 01 in W if OK, else  
return 00 in W  
This SCL input is used to synchronize the data transfer  
from and to the memory.  
;
; Read_Current: Read EEPROM at address  
currently held by EE device.  
6.0.3  
EEINTF REGISTER  
;
;
;
Inputs:NONE  
Outputs:  
The EEINTF register (SFR 90h) controls the access to  
the EEPROM. Figure 6.1 details the function of each  
bit. User code must generate the clock and data sig-  
nals.  
EEPROM Data  
EEDATA  
Return 01 in W if OK, else  
return 00 in W  
;
; Read_Random: Read EEPROM byte at supplied  
address  
;
;
;
Inputs:EEPROM Address  
Outputs: EEPROM Data  
EEADDR  
EEDATA  
Return 01 in W if OK,  
else return 00 in W  
FIGURE 6-1: EEINFT REGISTER (ADDRESS 90h)  
U-0  
-
U-0  
-
U-0  
-
U-0  
-
U-0  
-
R/W-1  
R/W-1  
R/W-1  
EESCL  
EESDA  
EEVDD  
R
W
U
= Readable bit  
= Writable bit  
= Unimplemented bit,  
read as ‘0’  
bit7  
bit0  
- n = Value at POR reset  
bit 7-3: Unimplemented: Read as '0'  
bit 2:  
EESCL: Clock line to the EEPROM  
1 = Clock high  
0 = Clock low  
bit 1:  
EESDA: Data line to EEPROM  
1 = Data line is high (pin is tri-stated, line is pulled high by a pull-up resistor)  
0 = Data line is low  
bit 0:  
EEVDD: VDD control bit for EEPROM  
1 = VDD is turned on EEPROM  
0 = VDD is turned off EEPROM (all pins are tri-stated and the EEPROM is powered down)  
Note: EESDA, EESCL and EEVDD will read ‘0’ if EEVDD is turned off  
1998 Microchip Technology Inc.  
Preliminary  
DS40182A-page 29  
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