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PIC16CE625-04/P 参数 Datasheet PDF下载

PIC16CE625-04/P图片预览
型号: PIC16CE625-04/P
PDF下载: 下载PDF文件 查看货源
内容描述: OTP 8位CMOS微控制器与EEPROM数据存储器 [OTP 8-Bit CMOS MCU with EEPROM Data Memory]
分类和应用: 存储微控制器和处理器外围集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 108 页 / 2330 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16CE62X  
5.3  
I/O Programming Considerations  
BI-DIRECTIONAL I/O PORTS  
EXAMPLE 5-2: READ-MODIFY-WRITE  
INSTRUCTIONS ON AN  
5.3.1  
I/O PORT  
;Initial PORT settings: PORTB<7:4> Inputs  
;
Any instruction which writes, operates internally as a  
read followed by a write operation. The BCF and BSF  
instructions, for example, read the register into the  
CPU, execute the bit operation and write the result back  
to the register. Caution must be used when these  
instructions are applied to a port with both inputs and  
outputs defined. For example, a BSFoperation on bit5  
of PORTB will cause all eight bits of PORTB to be read  
into the CPU. Then the BSF operation takes place on  
bit5 and PORTB is written to the output latches. If  
another bit of PORTB is used as a bidirectional I/O pin  
(e.g., bit0) and it is defined as an input at this time, the  
input signal present on the pin itself would be read into  
the CPU and re-written to the data latch of this  
particular pin, overwriting the previous content. As long  
as the pin stays in the input mode, no problem occurs.  
However, if bit0 is switched into output mode later on,  
the content of the data latch may now be unknown.  
;
PORTB<3:0> Outputs  
;PORTB<7:6> have external pull-up and are not  
;connected to other circuitry  
;
;
;
PORT latch PORT pins  
---------- ----------  
BCF PORTB, 7  
BCF PORTB, 6  
BSF STATUS,RP0  
BCF TRISB, 7  
BCF TRISB, 6  
;01pp pppp 11pp pppp  
;10pp pppp 11pp pppp  
;
;10pp pppp 11pp pppp  
;10pp pppp 10pp pppp  
;
;Note that the user may have expected the pin  
;values to be 00pp pppp. The 2nd BCF caused  
;RB7 to be latched as the pin value (High).  
5.3.2  
SUCCESSIVE OPERATIONS ON I/O PORTS  
Reading the port register, reads the values of the port  
pins. Writing to the port register writes the value to the  
port latch. When using read modify write instructions  
(ex. BCF, BSF, etc.) on a port, the value of the port pins  
is read, the desired operation is done to this value, and  
this value is then written to the port latch.  
The actual write to an I/O port happens at the end of an  
instruction cycle, whereas for reading, the data must be  
valid at the beginning of the instruction cycle  
(Figure 5-7). Therefore, care must be exercised if a  
write followed by a read operation is carried out on the  
same I/O port. The sequence of instructions should be  
such to allow the pin voltage to stabilize (load  
dependent) before the next instruction which causes  
that file to be read into the CPU is executed. Otherwise,  
the previous state of that pin may be read into the CPU  
rather than the new state. When in doubt, it is better to  
separate these instructions with an NOP or another  
instruction not accessing this I/O port.  
Example 5-2 shows the effect of two sequential  
read-modify-write instructions (ex., BCF, BSF, etc.) on  
an I/O port.  
A pin actively outputting a Low or High should not be  
driven from external devices at the same time in order  
to change the level on this pin (“wired-or”, “wired-and”).  
The resulting high output currents may damage  
the chip.  
FIGURE 5-7: SUCCESSIVE I/O OPERATION  
Note:  
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4  
This example shows write to PORTB  
followed by a read from PORTB.  
PC + 1  
MOVWF PORTB MOVF PORTB, W  
PC + 2  
NOP  
PC + 3  
NOP  
PC  
Instruction  
fetched  
PC  
Note that:  
Write to  
PORTB  
Read PORTB  
data setup time = (0.25 TCY - TPD)  
where TCY = instruction cycle and  
TPD = propagation delay of Q1 cycle  
to output valid.  
RB7:RB0  
Port pin  
sampled here  
Therefore, at higher clock frequencies,  
a
write followed by a read may be  
problematic.  
TPD  
Execute  
MOVWF  
PORTB  
Execute  
MOVF  
PORTB, W  
Execute  
NOP  
DS40182A-page 28  
Preliminary  
1998 Microchip Technology Inc.  
 
 
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