PIC16F87XA
TABLE 4-3:
Name
RB0/INT
RB1
RB2
RB3/PGM
(3)
RB4
RB5
RB6/PGC
RB7/PGD
PORTB FUNCTIONS
Bit#
bit0
bit1
bit2
bit3
bit4
bit5
bit6
bit7
Buffer
TTL/ST
(1)
TTL
TTL
TTL
TTL
TTL
TTL/ST
(2)
TTL/ST
(2)
Function
Input/output pin or external interrupt input.
Internal software programmable weak pull-up.
Input/output pin. Internal software programmable weak pull-up.
Input/output pin. Internal software programmable weak pull-up.
Input/output pin or programming pin in LVP mode. Internal software
programmable weak pull-up.
Input/output pin (with interrupt-on-change). Internal software programmable
weak pull-up.
Input/output pin (with interrupt-on-change). Internal software programmable
weak pull-up.
Input/output pin (with interrupt-on-change) or In-Circuit Debugger pin.
Internal software programmable weak pull-up. Serial programming clock.
Input/output pin (with interrupt-on-change) or In-Circuit Debugger pin.
Internal software programmable weak pull-up. Serial programming data.
Legend: TTL = TTL input, ST = Schmitt Trigger input
Note 1:
This buffer is a Schmitt Trigger input when configured as the external interrupt.
2:
This buffer is a Schmitt Trigger input when used in Serial Programming mode or In-Circuit Debugger.
3:
Low Voltage ICSP Programming (LVP) is enabled by default, which disables the RB3 I/O function. LVP
must be disabled to enable RB3 as an I/O pin and allow maximum compatibility to the other 28-pin and
40-pin mid-range devices.
TABLE 4-4:
Address
06h, 106h
86h, 186h
81h, 181h
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Name
Bit 7
RB7
Bit 6
RB6
INTEDG
Bit 5
RB5
Bit 4
RB4
Bit 3 Bit 2 Bit 1 Bit 0
RB3
PSA
RB2
PS2
RB1
PS1
Value on:
POR,
BOR
Value on
all other
RESETS
PORTB
TRISB
RB0
xxxx xxxx uuuu uuuu
1111 1111 1111 1111
PORTB Data Direction Register
T0CS T0SE
PS0
OPTION_REG RBPU
1111 1111 1111 1111
Legend:
x
= unknown,
u
= unchanged. Shaded cells are not used by PORTB.
2001 Microchip Technology Inc.
Advance Information
DS39582A-page 43
MICROCHIP [ MICROCHIP TECHNOLOGY ]
