欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC16LF876A-I/SO 参数 Datasheet PDF下载

PIC16LF876A-I/SO图片预览
型号: PIC16LF876A-I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 40分之28引脚增强型闪存微控制器 [28/40-pin Enhanced FLASH Microcontrollers]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 222 页 / 3815 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
 浏览型号PIC16LF876A-I/SO的Datasheet PDF文件第35页浏览型号PIC16LF876A-I/SO的Datasheet PDF文件第36页浏览型号PIC16LF876A-I/SO的Datasheet PDF文件第37页浏览型号PIC16LF876A-I/SO的Datasheet PDF文件第38页浏览型号PIC16LF876A-I/SO的Datasheet PDF文件第40页浏览型号PIC16LF876A-I/SO的Datasheet PDF文件第41页浏览型号PIC16LF876A-I/SO的Datasheet PDF文件第42页浏览型号PIC16LF876A-I/SO的Datasheet PDF文件第43页  
PIC16F87XA
3.7
Protection Against Spurious Write
3.8
Operation During Code Protect
There are conditions when the device should not write
to the data EEPROM or FLASH program memory. To
protect against spurious writes, various mechanisms
have been built-in. On power-up, WREN is cleared.
Also, the Power-up Timer (72 ms duration) prevents an
EEPROM write.
The write initiate sequence and the WREN bit together
help prevent an accidental write during brown-out,
power glitch, or software malfunction.
When the data EEPROM is code protected, the micro-
controller can read and write to the EEPROM normally.
However, all external access to the EEPROM is dis-
abled. External write access to the program memory is
also disabled.
When program memory is code protected, the micro-
controller can read and write to program memory nor-
mally, as well as execute instructions. Writes by the
device may be selectively inhibited to regions of the
memory, depending on the setting of bits WR1:WR0 of
the configuration word (see Section 14.1 for additional
information). External access to the memory is also
disabled.
TABLE 3-1:
REGISTERS/BITS ASSOCIATED WITH DATA EEPROM
AND FLASH PROGRAM MEMORIES
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-on
Reset
Value on
all other
RESETS
Address
10Ch
10Dh
10Eh
10Fh
18Ch
18Dh
0Dh
8Dh
EEDATA
EEADR
EEDATH
EEADRH
EECON1
EECON2
PIR2
PIE2
EEPROM/FLASH Data Register Low Byte
EEPROM/FLASH Address Register Low Byte
EEPGD
EEPROM/FLASH Data Register High Byte
EEPROM/FLASH Address Register High Byte
WRERR
WREN
WR
RD
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx ---0 q000
xxxx xxxx ---- ----
x--- x000 ---0 q000
---- ---- ---- ----
EEPROM Control Register2 (not a physical register)
CMIF
CMIE
EEIF
EEIE
BCLIF
BCLIE
CCP2IF
CCP2IE
-0-0 0--0 -0-0 0--0
-0-0 0--0 -0-0 0--0
Legend:
x
= unknown,
u
= unchanged,
-
= unimplemented, read as '0',
q
= value depends upon condition.
Shaded cells are not used by Data EEPROM or FLASH Program Memory.
2001 Microchip Technology Inc.
Advance Information
DS39582A-page 37