PIC16F7X
FIGURE 2-2: PIC16F74/73 PROGRAM
2.0
MEMORY ORGANIZATION
MEMORY MAP AND STACK
There are two memory blocks in each of these
PICmicro® MCUs. The Program Memory and Data
Memory have separate buses so that concurrent
access can occur and is detailed in this section. The
Program Memory can be read internally by user code
(see Section 4.0).
PC<12:0>
13
CALL, RETURN
RETFIE, RETLW
Additional information on device memory may be found
in the PICmicro Mid-Range Reference Manual,
(DS33023).
Stack Level 1
Stack Level 2
Stack Level 8
2.1
Program Memory Organization
The PIC16F7X devices have a 13-bit program counter
capable of addressing an 8K x 14 program memory
space. The PIC16F77/76 devices have 8K x 14 words
of FLASH program memory and the PIC16F73/74
devices have 4K x 14. Accessing a location above the
physically implemented address will cause a wrap-
around.
RESET Vector
0000h
Interrupt Vector
Page 0
0004h
0005h
The RESET Vector is at 0000h and the Interrupt Vector
is at 0004h.
On-Chip
Program
Memory
07FFh
0800h
FIGURE 2-1: PIC16F77/76 PROGRAM
MEMORY MAP AND STACK
Page 1
0FFFh
1000h
PC<12:0>
13
CALL, RETURN
RETFIE, RETLW
1FFFh
Stack Level 1
Stack Level 2
Stack Level 8
Reset Vector
0000h
Interrupt Vector
Page 0
0004h
0005h
07FFh
0800h
Page 1
On-Chip
Program
Memory
0FFFh
1000h
Page 2
Page 3
17FFh
1800h
1FFFh
2000 Microchip Technology Inc.
Advance Information
DS30325A-page 11
MICROCHIP [ MICROCHIP ]
