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PIC16F873A-I/SP 参数 Datasheet PDF下载

PIC16F873A-I/SP图片预览
型号: PIC16F873A-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 40分之28引脚增强型闪存微控制器 [28/40-pin Enhanced FLASH Microcontrollers]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 222 页 / 3815 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F87XA  
9.3.3  
ENABLING SPI I/O  
9.3.4  
TYPICAL CONNECTION  
To enable the serial port, SSP Enable bit, SSPEN  
(SSPCON<5>), must be set. To reset or reconfigure  
SPI mode, clear the SSPEN bit, re-initialize the  
SSPCON registers, and then set the SSPEN bit. This  
configures the SDI, SDO, SCK, and SS pins as serial  
port pins. For the pins to behave as the serial port func-  
tion, some must have their data direction bits (in the  
TRIS register) appropriately programmed. That is:  
Figure 9-2 shows a typical connection between two  
microcontrollers. The master controller (Processor 1)  
initiates the data transfer by sending the SCK signal.  
Data is shifted out of both shift registers on their pro-  
grammed clock edge, and latched on the opposite  
edge of the clock. Both processors should be pro-  
grammed to same Clock Polarity (CKP), then both con-  
trollers would send and receive data at the same time.  
Whether the data is meaningful (or dummy data)  
depends on the application software. This leads to  
three scenarios for data transmission:  
• SDI is automatically controlled by the SPI module  
• SDO must have TRISC<5> bit cleared  
• SCK (Master mode) must have TRISC<3> bit  
cleared  
• Master sends data — Slave sends dummy data  
• Master sends data — Slave sends data  
• SCK (Slave mode) must have TRISC<3> bit set  
• SS must have TRISC<4> bit set  
• Master sends dummy data — Slave sends data  
Any serial port function that is not desired may be over-  
ridden by programming the corresponding data direc-  
tion (TRIS) register to the opposite value.  
FIGURE 9-2:  
SPI MASTER/SLAVE CONNECTION  
SPI Master SSPM3:SSPM0 = 00xxb  
SPI Slave SSPM3:SSPM0 = 010xb  
SDO  
SDI  
Serial Input Buffer  
(SSPBUF)  
Serial Input Buffer  
(SSPBUF)  
SDI  
SDO  
Shift Register  
(SSPSR)  
Shift Register  
(SSPSR)  
LSb  
MSb  
MSb  
LSb  
Serial Clock  
SCK  
SCK  
PROCESSOR 1  
PROCESSOR 2  
2001 Microchip Technology Inc.  
Advance Information  
DS39582A-page 73  
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