PIC16F87XA
FIGURE 17-5:
CLKOUT AND I/O TIMING
Q1
Q2
Q3
Q4
OSC1
11
10
CLKOUT
13
14
12
16
18
19
I/O Pin
(Input)
15
17
I/O Pin
(Output)
New Value
Old Value
20, 21
Note: Refer to Figure 17-3 for load conditions.
TABLE 17-4: CLKOUT AND I/O TIMING REQUIREMENTS
Param
No.
Symbol
Characteristic
Min
Typ†
Max
Units Conditions
10*
11*
12*
13*
14*
15*
16*
17*
TosH2ckL OSC1↑ to CLKOUT↓
TosH2ckH OSC1↑ to CLKOUT↑
—
—
—
—
—
75
75
35
35
—
200
200
ns (Note 1)
ns (Note 1)
ns (Note 1)
ns (Note 1)
ns (Note 1)
ns (Note 1)
ns (Note 1)
ns
TckR
TckF
CLKOUT rise time
CLKOUT fall time
100
100
TckL2ioV CLKOUT ↓ to Port out valid
TioV2ckH Port in valid before CLKOUT↑
0.5TCY + 20
—
TOSC + 200
—
TckH2ioI
Port in hold after CLKOUT↑
0
—
—
TosH2ioV OSC1↑ (Q1 cycle) to
—
100
255
Port out valid
18*
TosH2ioI
OSC1↑ (Q2 cycle) to
Port input invalid (I/O in
hold time)
Standard (F)
100
200
—
—
—
—
ns
ns
Extended (LF)
19*
20*
TioV2osH Port input valid to OSC1↑ (I/O in setup time)
0
—
—
10
—
10
—
—
—
—
40
ns
ns
ns
ns
ns
ns
ns
TioR
Port output rise time
Port output fall time
INT pin high or low time
Standard (F)
Extended (LF)
Standard (F)
Extended (LF)
—
145
40
21*
TioF
—
—
145
—
22††* Tinp
23††* Trbp
TCY
TCY
RB7:RB4 change INT high or low time
—
*
These parameters are characterized but not tested.
†
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
†† These parameters are asynchronous events not related to any internal clock edges.
Note 1: Measurements are taken in RC mode where CLKOUT output is 4 x TOSC.
2001 Microchip Technology Inc.
Advance Information
DS39582A-page 181