PIC16F87XA
CCP2 Module:
8.0
CAPTURE/COMPARE/PWM
MODULES
Capture/Compare/PWM Register2 (CCPR2) is com-
prised of two 8-bit registers: CCPR2L (low byte) and
CCPR2H (high byte). The CCP2CON register controls
the operation of CCP2. The special event trigger is
generated by a compare match and will reset Timer1
and start an A/D conversion (if the A/D module is
enabled).
Each Capture/Compare/PWM (CCP) module contains
a 16-bit register which can operate as a:
• 16-bit Capture register
• 16-bit Compare register
• PWM Master/Slave Duty Cycle register
Additional information on CCP modules is available in
the PICmicro™ Mid-Range MCU Family Reference
Manual (DS33023) and in application note AN594,
“Using the CCP Modules” (DS00594).
Both the CCP1 and CCP2 modules are identical in
operation, with the exception being the operation of the
special event trigger. Table 8-1 and Table 8-2 show the
resources and interactions of the CCP module(s). In
the following sections, the operation of a CCP module
is described with respect to CCP1. CCP2 operates the
same as CCP1, except where noted.
TABLE 8-1:
CCP MODE - TIMER
RESOURCES REQUIRED
CCP1 Module:
CCP Mode
Capture
Compare
PWM
Timer Resource
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. The special event trigger is
generated by a compare match and will reset Timer1.
Timer1
Timer1
Timer2
TABLE 8-2:
INTERACTION OF TWO CCP MODULES
CCPx Mode CCPy Mode
Interaction
Capture
Capture
Compare
PWM
Capture
Same TMR1 time-base
Compare The compare should be configured for the special event trigger, which clears TMR1
Compare The compare(s) should be configured for the special event trigger, which clears TMR1
PWM
The PWMs will have the same frequency and update rate (TMR2 interrupt)
None
PWM
Capture
PWM
Compare None
2001 Microchip Technology Inc.
Advance Information
DS39582A-page 61
MICROCHIP [ MICROCHIP ]
