PIC16F87XA
The ADRESH:ADRESL registers contain the 10-bit
result of the A/D conversion. When the A/D conversion
is complete, the result is loaded into this A/D result reg-
ister pair, the GO/DONE bit (ADCON0<2>) is cleared
and the A/D interrupt flag bit ADIF is set. The block dia-
gram of the A/D module is shown in Figure 11-1.
2. Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set PEIE bit
• Set GIE bit
3. Wait the required acquisition time.
4. Start conversion:
After the A/D module has been configured as desired,
the selected channel must be acquired before the con-
version is started. The analog input channels must
have their corresponding TRIS bits selected as inputs.
• Set GO/DONE bit (ADCON0)
5. Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
(with interrupts enabled); OR
To determine sample time, see Section 11.1. After this
acquisition time has elapsed, the A/D conversion can
be started.
• Waiting for the A/D interrupt
6. Read
A/D
result
register
pair
These steps should be followed for doing an A/D
Conversion:
(ADRESH:ADRESL), clear bit ADIF, if required.
7. For the next conversion, go to step 1 or step 2,
as required. The A/D conversion time per bit is
defined as TAD.
1. Configure the A/D module:
• Configure analog pins/voltage reference and
digital I/O (ADCON1)
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)
FIGURE 11-1:
A/D BLOCK DIAGRAM
CHS2:CHS0
111
(1)
RE2/AN7
110
(1)
RE1/AN6
101
(1)
RE0/AN5
100
RA5/AN4
VAIN
011
(Input Voltage)
RA3/AN3/VREF+
A/D
Converter
010
RA2/AN2/VREF-
001
VDD
RA1/AN1
000
RA0/AN0
VREF+
(Reference
Voltage)
PCFG3:PCFG0
VREF-
(Reference
Voltage)
VSS
PCFG3:PCFG0
Note 1: Not available on 28-pin devices.
2001 Microchip Technology Inc.
Advance Information
DS39582A-page 127