PIC16C63A/65B/73B/74B
TABLE 11-5: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
Value on:
POR,
BOR
Value on
all other
RESETS
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0Bh,8Bh
0Ch
INTCON
PIR1
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x 0000 000u
(1)
(2)
PSPIF
SPEN
ADIF
RX9
RCIF
TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000
0000 0000
0000 -00x
0000 0000
0000 0000
0000 -010
0000 0000
18h
RCSTA
SREN CREN
—
FERR
OERR
RX9D
0000 -00x
0000 0000
19h
TXREG USART Transmit Register
(1)
(2)
8Ch
PIE1
PSPIE
CSRC
ADIE
TX9
RCIE
TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000
98h
TXSTA
TXEN SYNC
—
BRGH
TRMT
TX9D
0000 -010
0000 0000
99h
SPBRG Baud Rate Generator Register
Legend: u= unchanged, x= unknown, - = unimplemented, read as '0'.
Shaded cells are not used for synchronous master transmission.
Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C63A/73B; always maintain these bits clear.
2: Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear.
FIGURE 11-6:
SYNCHRONOUS TRANSMISSION
Q1Q2 Q3Q4 Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2 Q3Q4
Q3Q4 Q1Q2 Q3Q4 Q1Q2 Q3Q4 Q1Q2 Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4
RC7/RX/DT
pin
bit 0
bit 1
bit 2
bit 7
bit 0
bit 1
bit 7
Word 2
Word 1
RC6/TX/CK
pin
Write to
TXREG reg
Write word1
Write word2
TXIF bit
(Interrupt Flag)
TRMT
TRMT bit
’1’
’1’
TXEN bit
Note: Sync Master mode; SPBRG = ’0’. Continuous transmission of two 8-bit words.
FIGURE 11-7:
SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
RC7/RX/DT pin
bit0
bit2
bit1
bit6
bit7
RC6/TX/CK pin
Write to
TXREG reg
TXIF bit
TRMT bit
TXEN bit
2000 Microchip Technology Inc.
DS30605C-page 73