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PIC16C72A-04I/SO 参数 Datasheet PDF下载

PIC16C72A-04I/SO图片预览
型号: PIC16C72A-04I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 28引脚8位CMOS微控制器 [28-Pin 8-Bit CMOS Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 120 页 / 1994 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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PIC16C62B/72A
2.3
PCL and PCLATH
2.4
Program Memory Paging
The program counter (PC) specifies the address of the
instruction to fetch for execution. The PC is 13 bits
wide. The low byte is called the PCL register and is
readable and writable. The high byte is called the PCH
register. This register contains the PC<12:8> bits and
is not directly accessible. All updates to the PCH regis-
ter go through the PCLATH register.
2.3.1
STACK
The
CALL
and
GOTO
instructions provide 11 bits of
address to allow branching within any 2K program
memory page. When doing a
CALL
or
GOTO
instruction,
the upper bit of the address is provided by
PCLATH<3>. The user must ensure that the page
select bit is programmed to address the proper pro-
gram memory page. If a return from a
CALL
instruction
(or interrupt) is executed, the entire 13-bit PC is popped
from the stack. Therefore, manipulation of the
PCLATH<3> bit is not required for the return instruc-
tions.
The stack allows any combination of up to 8 program
calls and interrupts to occur. The stack contains the
return address from this branch in program execution.
Mid-range devices have an 8 level deep hardware
stack. The stack space is not part of either program or
data space and the stack pointer is not accessible. The
PC is PUSHed onto the stack when a
CALL
instruction
is executed or an interrupt causes a branch. The stack
is POPed in the event of a
RETURN, RETLW
or a
RET-
FIE
instruction execution. PCLATH is not modified
when the stack is PUSHed or POPed.
After the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
©
1999 Microchip Technology Inc.
Preliminary
DS35008B-page 17