PIC16C62B/72A
FIGURE 13-15: I2C BUS START/STOP BITS TIMING
SCL
91
93
90
92
SDA
STOP
Condition
START
Condition
Note: Refer to Figure 13-4 for load conditions.
TABLE 13-11: I2C BUS START/STOP BITS REQUIREMENTS
Parameter
No.
Sym
Characteristic
Min Ty Max Unit
Conditions
p
s
90*
91*
92*
93
TSU:STA
START condition 100 kHz mode
4700
600
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ns Only relevant for repeated
START condition
Setup time
400 kHz mode
THD:STA
TSU:STO
THD:STO
START condition 100 kHz mode
4000
600
ns After this period the first clock
pulse is generated
Hold time
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
STOP condition
Setup time
4700
600
ns
STOP condition
Hold time
4000
600
ns
*
These parameters are characterized but not tested.
1998 Microchip Technology Inc.
Preliminary
DS35008B-page 99