PIC16C63A/65B/73B/74B
timers that offer necessary delays on power-up. One is
the Oscillator Start-up Timer (OST), intended to keep the
chip in RESET until the crystal oscillator is stable. The
other is the Power-up Timer (PWRT), which provides a
fixed delay of 72 ms (nominal) on power-up only and is
designed to keep the part in RESET, while the power
supply stabilizes. With these two timers on-chip, most
applications need no external RESET circuitry.
13.0 SPECIAL FEATURES OF THE
CPU
What sets a microcontroller apart from other proces-
sors are special circuits to deal with the needs of real-
time applications. The PIC16CXX family has a host of
such features intended to maximize system reliability,
minimize cost through elimination of external compo-
nents, provide power saving operating modes and offer
code protection. These are:
SLEEP mode is designed to offer a very low current
power-down mode. The user can wake-up from SLEEP
through external RESET, WDT wake-up or through an
interrupt.
• Oscillator selection
• RESET
Several oscillator options are also made available to
allow the part to fit the application. The RC oscillator
option saves system cost, while the LP crystal option
saves power. A set of configuration bits are used to
select various options.
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
- Brown-out Reset (BOR)
• Interrupts
13.1 Configuration Bits
• Watchdog Timer (WDT)
• SLEEP
The configuration bits can be programmed (read as '0')
or left unprogrammed (read as '1') to select various
device configurations. These bits are mapped in pro-
gram memory location 2007h.
• Code protection
• ID locations
• In-Circuit Serial Programming (ICSP)
The user will note that address 2007h is beyond the
user program memory space, and can be accessed
only during programming.
The PIC16CXX has a Watchdog Timer which can be
shut off only through configuration bits. It runs off its
own RC oscillator for added reliability. There are two
REGISTER 13-1: CONFIGURATION WORD (CONFIG 2007h)
CP1
CP0
CP1
CP0
CP1
CP0
—
BODEN CP1
CP0 PWRTE WDTE FOSC1 FOSC0
bit 0
bit 13
(2)
bits 13-8, CP1:CP0: Code Protection bits
5-4 11= Code protection off
10= Upper half of program memory code protected
01= Upper 3/4th of program memory code protected
00= All memory is code protected
bit 7
bit 6
Unimplemented: Read as '1'
(1)
BODEN: Brown-out Reset Enable bit
1= BOR enabled
0= BOR disabled
(1)
bit 3
PWRTE: Power-up Timer Enable bit
1= PWRT disabled
0= PWRT enabled
bit 2
WDTE: Watchdog Timer Enable bit
1= WDT enabled
0= WDT disabled
bit 1-0
FOSC1:FOSC0: Oscillator Selection bits
11= RC oscillator
10= HS oscillator
01= XT oscillator
00= LP oscillator
Note 1: Enabling Brown-out Reset automatically enables Power-up Timer (PWRT), regardless of the value of
PWRTE.
2: All of the CP1:CP0 pairs have to be given the same value to enable the code protection scheme listed.
2000 Microchip Technology Inc.
DS30605C-page 85