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PIC16C63A-04I/SP 参数 Datasheet PDF下载

PIC16C63A-04I/SP图片预览
型号: PIC16C63A-04I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 40分之28引脚8位CMOS微控制器 [28/40-Pin 8-Bit CMOS Microcontrollers]
分类和应用: 微控制器和处理器外围集成电路光电二极管可编程只读存储器时钟
文件页数/大小: 184 页 / 2122 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16C63A/65B/73B/74B  
8.1  
Timer2 Prescaler and Postscaler  
8.0  
TIMER2 MODULE  
The prescaler and postscaler counters are cleared  
when any of the following occurs:  
Timer2 is an 8-bit timer with a prescaler and a  
postscaler. It can be used as the PWM time-base for  
the PWM mode of the CCP module(s). The TMR2 reg-  
ister is readable and writable, and is cleared on any  
device RESET.  
a write to the TMR2 register  
a write to the T2CON register  
any device RESET (POR, BOR, MCLR Reset, or  
WDT Reset)  
The input clock (FOSC/4) has a prescale option of 1:1,  
1:4,  
or  
1:16,  
selected  
by  
control  
bits  
TMR2 is not cleared when T2CON is written.  
T2CKPS1:T2CKPS0 (T2CON<1:0>).  
The Timer2 module has an 8-bit period register, PR2.  
Timer2 increments from 00h until it matches PR2 and  
then resets to 00h on the next increment cycle. PR2 is  
a readable and writable register. The PR2 register is  
initialized to FFh upon RESET.  
8.2  
Output of TMR2  
The output of TMR2 (before the postscaler) is fed to the  
SSP module, which optionally uses it to generate the  
shift clock.  
The match output of TMR2 goes through a 4-bit  
postscaler (which gives a 1:1 to 1:16 scaling inclusive)  
to generate a TMR2 interrupt (latched in flag bit  
TMR2IF, (PIR1<1>)).  
FIGURE 8-1:  
TIMER2 BLOCK DIAGRAM  
Sets Flag  
TMR2  
Output(1)  
RESET  
bit TMR2IF  
Timer2 can be shut-off by clearing control bit TMR2ON  
(T2CON<2>) to minimize power consumption.  
Prescaler  
TMR2 reg  
FOSC/4  
1:1, 1:4, 1:16  
Register 8-1 shows the Timer2 control register.  
Postscaler  
2
Comparator  
1:1 to 1:16  
4
Additional information on timer modules is available in  
the PICmicroMid-Range MCU Family Reference  
Manual (DS33023).  
EQ  
T2CKPS1:  
T2CKPS0  
PR2 reg  
T2OUTPS3:  
T2OUTPS0  
Note 1: TMR2 register output can be software selected by the  
SSP module as a baud clock.  
REGISTER 8-1:  
T2CON: TIMER2 CONTROL REGISTER (ADDRESS 12h)  
U-0  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0  
bit 0  
bit 7  
bit 7  
Unimplemented: Read as '0'  
bit 6-3  
TOUTPS3:TOUTPS0: Timer2 Output Postscale Select bits  
0000= 1:1 Postscale  
0001= 1:2 Postscale  
0010= 1:3 Postscale  
1111= 1:16 Postscale  
bit 2  
TMR2ON: Timer2 On bit  
1= Timer2 is on  
0= Timer2 is off  
bit 1-0  
T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits  
00= Prescaler is 1  
01= Prescaler is 4  
1x= Prescaler is 16  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
U = Unimplemented bit, read as 0’  
0= Bit is cleared x = Bit is unknown  
1= Bit is set  
2000 Microchip Technology Inc.  
DS30605C-page 47