欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC12F635-I/SN 参数 Datasheet PDF下载

PIC12F635-I/SN图片预览
型号: PIC12F635-I/SN
PDF下载: 下载PDF文件 查看货源
内容描述: 8月14日引脚,基于闪存的8位CMOS微控制器采用纳瓦技术 [8/14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 234 页 / 3856 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC12F635-I/SN的Datasheet PDF文件第47页浏览型号PIC12F635-I/SN的Datasheet PDF文件第48页浏览型号PIC12F635-I/SN的Datasheet PDF文件第49页浏览型号PIC12F635-I/SN的Datasheet PDF文件第50页浏览型号PIC12F635-I/SN的Datasheet PDF文件第52页浏览型号PIC12F635-I/SN的Datasheet PDF文件第53页浏览型号PIC12F635-I/SN的Datasheet PDF文件第54页浏览型号PIC12F635-I/SN的Datasheet PDF文件第55页  
PIC12F635/PIC16F636/639  
REGISTER 4-3:  
WDA: WEAK PULL-UP/PULL-DOWN DIRECTION REGISTER  
U-0  
U-0  
R/W-1  
WDA5  
R/W-1  
WDA4  
U-0  
R/W-1  
WDA2  
R/W-1  
WDA1  
R/W-1  
WDA0  
bit 7  
bit 0  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
bit 7-6  
bit 5-4  
Unimplemented: Read as ‘0’  
WDA<5:4>: Pull-up/Pull-down Selection bits  
1= Pull-up selected  
0= Pull-down selected  
bit 3  
Unimplemented: Read as ‘0’  
bit 2-0  
WDA<2:0>: Pull-up/Pull-down Selection bits  
1= Pull-up selected  
0= Pull-down selected  
Note 1: The weak pull-up/pull-down device is enabled only when the global RAPU bit is enabled, the pin is in Input mode (TRIS  
= 1), the individual WDA bit is enabled (WDA = 1) and the pin is not configured as an analog input or clock function.  
2: RA3 pull-up is enabled when the pin is configured as MCLR in the Configuration Word register and the device is not in  
Programming mode.  
REGISTER 4-4:  
WPUDA: WEAK PULL-UP/PULL-DOWN ENABLE REGISTER  
U-0  
U-0  
R/W-1  
R/W-1  
U-0  
R/W-1  
R/W-1  
R/W-1  
(3)  
(3)  
WPUDA5  
WPUDA4  
WPUDA2  
WPUDA1  
WPUDA0  
bit 7  
bit 0  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared  
x = Bit is unknown  
bit 7-6  
bit 5-4  
Unimplemented: Read as ‘0’  
(3)  
WPUDA<5:4>: Pull-up/Pull-down Direction Selection bits  
1= Pull-up/pull-down enabled  
0= Pull-up/pull-down disabled  
bit 3  
Unimplemented: Read as ‘0’  
bit 2-0  
WPUDA<2:0>: Pull-up/Pull-down Direction Selection bits  
1= Pull-up/pull-down enabled  
0= Pull-up/pull-down disabled  
Note 1: The weak pull-up/pull-down direction device is enabled only when the global RAPU bit is enabled, the pin is in Input mode  
(TRIS = 1), the individual WPUDA bit is enabled (WPUDA = 1) and the pin is not configured as an analog input or clock  
function.  
2: RA3 pull-up is enabled when the pin is configured as MCLR in the Configuration Word register and the device is not in  
Programming mode.  
3: WPUDA5 bit can be written if INTOSC is enabled and T1OSC is disabled; otherwise, the bit can not be written and reads  
as ‘1’. WPUDA4 bit can be written if not configured as OSC2; otherwise, the bit can not be written and reads as ‘1’  
© 2007 Microchip Technology Inc.  
DS41232D-page 49  
 复制成功!