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PIC12F635-I/SN 参数 Datasheet PDF下载

PIC12F635-I/SN图片预览
型号: PIC12F635-I/SN
PDF下载: 下载PDF文件 查看货源
内容描述: 8月14日引脚,基于闪存的8位CMOS微控制器采用纳瓦技术 [8/14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 234 页 / 3856 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC12F635/PIC16F636/639  
15.0 ELECTRICAL SPECIFICATIONS  
(†)  
Absolute Maximum Ratings  
Ambient temperature under bias....................................................................................................... -40°C to +125°C  
Storage temperature ........................................................................................................................ -65°C to +150°C  
Voltage on VDD with respect to VSS ................................................................................................... -0.3V to +6.5V  
Voltage on MCLR with respect to Vss ............................................................................................... -0.3V to +13.5V  
Voltage on all other pins with respect to VSS ........................................................................... -0.3V to (VDD + 0.3V)  
Total power dissipation(1) ............................................................................................................................... 800 mW  
Maximum current out of VSS/VSST pin .............................................................................................................. 95 mA  
Maximum current into VDD/VDDT pin................................................................................................................. 95 mA  
Input clamp current, IIK (VI < 0 or VI > VDD)............................................................................................................... 20 mA  
Output clamp current, IOK (VO < 0 or VO >VDD)....................................................................................................... 20 mA  
Maximum output current sunk by any I/O pin....................................................................................................25 mA  
Maximum output current sourced by any I/O pin .............................................................................................. 25 mA  
Maximum current sunk by PORTA and PORTC (combined) ............................................................................ 95 mA  
Maximum current sourced PORTA and PORTC (combined)............................................................................ 95 mA  
Maximum LC Input Voltage (LCX, LCY, LCZ)(2) loaded, with device ............................................................ 10.0 VPP  
Maximum LC Input Voltage (LCX, LCY, LCZ)(2) unloaded, without device ................................................. 700.0 VPP  
Maximum Input Current (rms) into device per LC Channel(2) ........................................................................... 10 mA  
Human Body ESD rating........................................................................................................................4000 (min.) V  
Machine Model ESD rating ......................................................................................................................400 (min.) V  
Note 1: Power dissipation for PIC12F635/PIC16F636/639 (AFE section not included) is calculated as follows:  
PDIS = VDD x {IDD - IOH} + {(VDD-VOH) x IOH} + (VOL x IOL).  
Power dissipation for AFE section is calculated as follows:  
PDIS = VDD x IACT = 3.6V x 16 μA = 57.6 μW  
2: Specification applies to the PIC16F639 only.  
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the  
device. This is a stress rating only and functional operation of the device at those or any other conditions above those  
indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for  
extended periods may affect device reliability.  
Note:  
Voltage spikes below VSS at the MCLR pin, inducing currents greater than 80 mA, may cause latch-up.  
Thus, a series resistor of 50-100Ω should be used when applying a ‘low’ level to the MCLR pin, rather than  
pulling this pin directly to VSS.  
© 2007 Microchip Technology Inc.  
DS41232D-page 163  
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