PIC12F629/675
1.0
DEVICE OVERVIEW
This document contains device specific information for
the PIC12F629/675. Additional information may be
found in the PIC
®
Mid-Range Reference Manual
(DS33023), which may be obtained from your local
Microchip Sales Representative or downloaded from
the Microchip web site. The Reference Manual should
be considered a complementary document to this Data
Sheet, and is highly recommended reading for a better
understanding of the device architecture and operation
of the peripheral modules.
The PIC12F629 and PIC12F675 devices are covered
by this Data Sheet. They are identical, except the
PIC12F675 has a 10-bit A/D converter. They come in
8-pin PDIP, SOIC, MLF-S and DFN packages.
675 devices. Table 1-1 shows the pinout description.
FIGURE 1-1:
PIC12F629/675 BLOCK DIAGRAM
13
Flash
Program
Memory
1K x 14
Program Counter
Data Bus
8
GP0/AN0/CIN+
GP1/AN1/CIN-/V
REF
GP2/AN2/T0CKI/INT/COUT
GP3/MCLR/V
PP
GP4/AN3/T1G/OSC2/CLKOUT
GP5/T1CKI/OSC1/CLKIN
8-Level Stack
(13-bit)
Program
Bus
RAM
File
Registers
64 x 8
9
RAM
Addr
(1)
14
Instruction Reg
Direct Addr
7
Addr MUX
8
Indirect
Addr
FSR Reg
Internal
4 MHz
Oscillator
Instruction
Decode &
Control
Timing
Generation
OSC1/CLKIN
OSC2/CLKOUT
V
DD
, V
SS
8
3
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Detect
8
W Reg
STATUS Reg
MUX
ALU
T1G
T1CKI
Timer0
T0CKI
Timer1
Analog to Digital Converter
(PIC12F675 only)
Analog
Comparator
and reference
EEDATA
8 128 bytes
DATA
EEPROM
EEADDR
CIN- CIN+ COUT
V
REF
AN0 AN1 AN2 AN3
Note 1:
Higher order bits are from STATUS register.
2010 Microchip Technology Inc.
DS41190G-page 7