PIC12F629/675
FIGURE 12-7:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
VDD
MCLR
30
Internal
POR
33
PWRT
Time-out
32
OSC
Time-out
Internal
RESET
Watchdog
Timer
Reset
31
34
34
I/O Pins
FIGURE 12-8:
BROWN-OUT DETECT TIMING AND CHARACTERISTICS
VDD
BVDD
(Device not in Brown-out Detect)
(Device in Brown-out Detect)
35
RESET (due to BOD)
72 ms time-out(1)
Note 1: 72 ms delay only if PWRTE bit in configuration word is programmed to ‘0’.
2003 Microchip Technology Inc.
DS41190C-page 97