PIC12F629/675
FIGURE 12-6:
CLKOUT AND I/O TIMING
Q1
Q2
Q3
Q4
OSC1
11
10
22
23
CLKOUT
13
12
19
18
14
16
I/O pin
(Input)
15
17
I/O pin
(Output)
New Value
Old Value
20, 21
TABLE 12-3: CLKOUT AND I/O TIMING REQUIREMENTS
Param
No.
Sym
Characteristic
Min
Typ†
Max
Units Conditions
±0
TosH2ckL OSC±↑ to CLK-
OUT↓
—
75
75
200
200
ns
ns
(Note 1)
(Note 1)
±±
TosH2ckH OSC±↑ to CLK-
OUT↑
—
±2
±3
±4
±5
TckR
TckF
CLKOUT rise time
CLKOUT fall time
—
—
—
35
35
—
—
±00
±00
20
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 1)
(Note 1)
TckL2ioV CLKOUT↓ to Port out valid
TioV2ckH Port in valid before CLKOUT↑
TOSC + 200
ns
—
±6
±7
TckH2ioI
Port in hold after CLKOUT↑
0
—
—
50
—
—
—
±50 *
300
—
ns
ns
ns
ns
(Note 1)
TosH2ioV OSC±↑ (Q± cycle) to Port out valid
—
±8
±9
TosH2ioI OSC±↑ (Q2 cycle) to Port input
invalid (I/O in hold time)
±00
TioV2osH Port input valid to OSC±↑
(I/O in setup time)
0
—
—
ns
20
2±
22
23
TioR
TioF
Tinp
Trbp
Port output rise time
—
—
±0
±0
—
—
40
40
—
—
ns
ns
ns
ns
Port output fall time
INT pin high or low time
GPIO change INT high or low time
25
TCY
*
These parameters are characterized but not tested.
Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated.
†
Note 1: Measurements are taken in RC mode where CLKOUT output is 4xTOSC.
DS41190C-page 96
2003 Microchip Technology Inc.