PIC12F629/675
FIGURE 12-9:
TIMER0 AND TIMER1 EXTERNAL CLOCK TIMINGS
T0CKI
40
41
42
T±CKI
45
46
48
47
TMR0 or
TMR1
TABLE 12-5: TIMER0 AND TIMER1 EXTERNAL CLOCK REQUIREMENTS
Param
No.
Sym
Tt0H
Characteristic
T0CKI High Pulse Width
Min
Typ† Max Units
Conditions
40*
No Prescaler
With Prescaler
No Prescaler
With Prescaler
0.5 TCY + 20
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
10
0.5 TCY + 20
10
41*
42*
Tt0L
Tt0P
T0CKI Low Pulse Width
T0CKI Period
Greater of:
20 or TCY + 40
N
ns N = prescale value
(2, 4, ..., 256)
45*
46*
47*
Tt1H
Tt1L
T1CKI High Time Synchronous, No Prescaler
0.5 TCY + 20
—
—
—
—
ns
ns
Synchronous,
with Prescaler
15
Asynchronous
30
0.5 TCY + 20
15
—
—
—
—
—
—
ns
ns
ns
T1CKI Low Time Synchronous, No Prescaler
Synchronous,
with Prescaler
Asynchronous
30
—
—
—
—
ns
Tt1P
Ft1
T1CKI Input
Period
Synchronous
Greater of:
30 or TCY + 40
N
ns N = prescale value
(1, 2, 4, 8)
Asynchronous
60
—
—
—
ns
Timer1 oscillator input frequency range
DC
200*
kHz
(oscillator enabled by setting bit T1OSCEN)
48
TCKEZtmr1 Delay from external clock edge to timer increment
2 TOSC*
—
7
—
TOSC*
*
These parameters are characterized but not tested.
†
Data in ‘Typ’ column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
2003 Microchip Technology Inc.
DS41190C-page 99
MICROCHIP [ MICROCHIP ]
