PIC12C5XX
Pin Diagram - PIC12C508/509
PDIP, 208 mil SOIC, Windowed Ceramic Side Brazed
VSS
VDD
1
2
3
4
8
7
6
5
GP0
GP5/OSC1/CLKIN
GP4/OSC2
GP1
GP3/MCLR/VPP
GP2/T0CKI
Pin Diagram - PIC12C508A/509A,
PIC12CE518/519
PDIP, 150 & 208 mil SOIC, Windowed CERDIP
VSS
VDD
1
2
3
4
8
7
6
5
GP0
GP5/OSC1/CLKIN
GP4/OSC2
GP1
GP3/MCLR/VPP
GP2/T0CKI
Pin Diagram - PIC12CR509A
PDIP, 150 & 208 mil SOIC
VSS
VDD
1
8
7
6
5
GP0
GP5/OSC1/CLKIN
GP4/OSC2
2
3
4
GP1
GP3/MCLR/VPP
GP2/T0CKI
Device Differences
Device
Oscillator
Process
Technology
(Microns)
Voltage
Range
2
Oscillator
Calibration
(Bits)
PIC12C508A
PIC12LC508A
PIC12C508
3.0-5.5
2.5-5.5
2.5-5.5
3.0-5.5
2.5-5.5
2.5-5.5
2.5-5.5
3.0-5.5
2.5-5.5
3.0-5.5
2.5-5.5
See Note 1
6
6
4
6
6
4
6
6
6
6
6
0.7
0.7
0.9
0.7
0.7
0.9
0.7
0.7
0.7
0.7
0.7
See Note 1
See Note 1
PIC12C509A
PIC12LC509A
PIC12C509
See Note 1
See Note 1
See Note 1
PIC12CR509A
PIC12CE518
PIC12LCE518
PIC12CE519
PIC12LCE519
See Note 1
-
-
-
-
Note 1: If you change from the PIC12C50X to the PIC12C50XA or to the PIC12CR50XA, please verify
oscillator characteristics in your application.
Note 2: See Section 7.2.5 for OSCCAL implementation differences.
DS40139E-page 2
1999 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
