PIC12F629/675
The Timer1 Control register (T1CON), shown in
Register 5.1, is used to enable/disable Timer1 and
select the various features of the Timer1 module.
5.0
TIMER1 MODULE WITH GATE
CONTROL
The PIC12F629/675 devices have a 16-bit timer.
Figure 5-1 shows the basic block diagram of the Timer1
module. Timer1 has the following features:
Note: Additional information on timer modules is
available in the PIC® Mid-Range Refer-
ence Manual, (DS33023).
• 16-bit timer/counter (TMR1H:TMR1L)
• Readable and writable
• Internal or external clock selection
• Synchronous or asynchronous operation
• Interrupt on overflow from FFFFh to 0000h
• Wake-up upon overflow (Asynchronous mode)
• Optional external enable input (T1G)
• Optional LP oscillator
FIGURE 5-1:
TIMER1 BLOCK DIAGRAM
TMR1ON
TMR1GE
T1G
TMR1ON
TMR1GE
Set Flag bit
TMR1IF on
Overflow
TMR1
Synchronized
Clock Input
0
TMR1L
TMR1H
1
LP Oscillator
T1SYNC
OSC1
OSC2
1
0
Synchronize
Detect
Prescaler
1, 2, 4, 8
FOSC/4
Internal
Clock
2
Sleep Input
T1CKPS<1:0>
INTOSC
w/o CLKOUT
TMR1CS
T1OSCEN
LP
DS41190G-page 32
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
