PIC12F609/615/12HV609/615
FIGURE 6-1:
TIMER1 BLOCK DIAGRAM
TMR1GE
T1GINV
TMR1ON
Set flag bit
TMR1IF on
Overflow
To Comparator Module
Timer1 Clock
(2)
TMR1
TMR1H
Synchronized
clock input
0
EN
TMR1L
1
Oscillator
(1)
T1SYNC
OSC1/T1CKI
1
(3)
Synchronize
det
Prescaler
1, 2, 4, 8
0
OSC2/T1G
2
T1CKPS<1:0>
TMR1CS
0
1
INTOSC
Without CLKOUT
1
0
FOSC
1
0
T1OSCEN
FOSC/4
Internal
Clock
COUT
(2)
T1GSEL
T1GSS
T1ACS
(4, 5)
GP3/T1G
Note 1:
ST Buffer is low power type when using LP oscillator, or high speed type when using T1CKI.
Timer1 register increments on rising edge.
Synchronize does not operate while in Sleep.
2:
3:
4:
Alternate pin function.
5:
PIC12F615/HV615 only.
DS41302A-page 46
Preliminary
© 2006 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
