PIC10F200/202/204/206
EXAMPLE 7-2:
CHANGING PRESCALER
(WDT→TIMER0)
CLRWDT
;Clear WDT and
;prescaler
MOVLW ‘xxxx0xxx’ ;Select TMR0, new
;prescale value and
;clock source
OPTION
FIGURE 7-5:
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
(2)
GP2/T0CKI
Pin
TCY (= FOSC/4)
Data Bus
8
0
1
M
U
X
1
0
1
0
M
U
X
Comparator
Output
Sync
2
Cycles
TMR0 Reg
(1)
(1)
T0SE
T0CS
(1)
PSA
(3)
CMPT0CS
0
1
8-bit Prescaler
M
U
X
8
Watchdog
Timer
(1)
8-to-1 MUX
PS<2:0>
(1)
PSA
1
0
WDT Enable bit
(1)
MUX
PSA
WDT
Time-out
Note 1: T0CS, T0SE, PSA, PS<2:0> are bits in the OPTION register.
2: T0CKI is shared with pin GP2.
3: Bit CMPT0CS is located in the CMCON0 register.
DS41239D-page 36
© 2007 Microchip Technology Inc.
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