PIC10F200/202/204/206
4.7
Program Counter
4.7.1
EFFECTS OF RESET
As a program instruction is executed, the Program
Counter (PC) will contain the address of the next
program instruction to be executed. The PC value is
increased by one every instruction cycle, unless an
instruction changes the PC.
For a
GOTO
instruction, bits 8:0 of the PC are provided
by the
GOTO
instruction word. The Program Counter
Low (PCL) is mapped to PC<7:0>.
For a
CALL
instruction, or any instruction where the
PCL is the destination, bits 7:0 of the PC again are pro-
vided by the instruction word. However, PC<8> does
not come from the instruction word, but is always
cleared (Figure 4-5).
Instructions where the PCL is the destination, or modify
PCL instructions, include
MOVWF PC, ADDWF PC
and
BSF PC,5.
Note:
Because PC<8> is cleared in the
CALL
instruction or any modify PCL instruction,
all subroutine calls or computed jumps are
limited to the first 256 locations of any
program memory page (512 words long).
The PC is set upon a Reset, which means that the PC
addresses the last location in program memory (i.e.,
the oscillator calibration instruction). After executing
MOVLW XX,
the PC will roll over to location 0000h and
begin executing user code.
4.8
Stack
The PIC10F200/204 devices have a 2-deep, 8-bit wide
hardware PUSH/POP stack.
The PIC10F202/206 devices have a 2-deep, 9-bit wide
hardware PUSH/POP stack.
A
CALL
instruction will PUSH the current value of Stack 1
into Stack 2 and then PUSH the current PC value,
incremented by one, into Stack Level 1. If more than two
sequential
CALLs
are executed, only the most recent two
return addresses are stored.
A
RETLW
instruction will POP the contents of Stack
Level 1 into the PC and then copy Stack Level 2
contents into level 1. If more than two sequential
RETLWs
are executed, the stack will be filled with the
address previously stored in Stack Level 2.
Note 1:
The W register will be loaded with the lit-
eral value specified in the instruction. This
is particularly useful for the implementa-
tion of the data look-up tables within the
program memory.
2:
There are no Status bits to indicate stack
overflows or stack underflow conditions.
3:
There are no instruction mnemonics
called PUSH or POP. These are actions
that occur from the execution of the
CALL
and
RETLW
instructions.
FIGURE 4-5:
GOTO
Instruction
LOADING OF PC
BRANCH INSTRUCTIONS
8 7
PC
PCL
Instruction Word
0
CALL
or Modify PCL Instruction
8 7
PC
PCL
Instruction Word
Reset to ‘0’
0
DS41239D-page 22
©
2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
