PIC10F200/202/204/206
TABLE 5-2:
Address
N/A
N/A
03h
06h
Legend:
SUMMARY OF PORT REGISTERS
Bit 7
—
GPWU
GPWUF
—
Bit 6
—
GPPU
CWUF
—
Bit 5
—
T0CS
—
—
Bit 4
—
T0SE
TO
—
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-On
Reset
---- 1111
PS0
C
GP0
1111 1111
00-1 1xxx
---- xxxx
Value on
All Other Resets
---- 1111
1111 1111
qq-q quuu
(1), (2)
---- uuuu
Name
TRISGPIO
OPTION
STATUS
GPIO
I/O Control Register
PSA
PD
GP3
PS2
Z
GP2
PS1
DC
GP1
Note 1:
2:
Shaded cells are not used by PORT registers, read as ‘0’, – = unimplemented, read as ‘0’,
x
= unknown,
u
=
unchanged,
q
= depends on condition.
If Reset was due to wake-up on pin change, then bit 7 =
1.
All other Resets will cause bit 7 =
0.
If Reset was due to wake-up on comparator change, then bit 6 =
1.
All other Resets will cause bit 6 =
0.
5.4
5.4.1
I/O Programming Considerations
BIDIRECTIONAL I/O PORTS
EXAMPLE 5-1:
READ-MODIFY-WRITE
INSTRUCTIONS ON AN
I/O PORT
Some instructions operate internally as read followed
by write operations. The
BCF
and
BSF
instructions, for
example, read the entire port into the CPU, execute the
bit operation and rewrite the result. Caution must be
used when these instructions are applied to a port
where one or more pins are used as input/outputs. For
example, a
BSF
operation on bit 2 of GPIO will cause
all eight bits of GPIO to be read into the CPU, bit 2 to
be set and the GPIO value to be written to the output
latches. If another bit of GPIO is used as a bidirectional
I/O pin (say bit 0), and it is defined as an input at this
time, the input signal present on the pin itself would be
read into the CPU and rewritten to the data latch of this
particular pin, overwriting the previous content. As long
as the pin stays in the Input mode, no problem occurs.
However, if bit 0 is switched into Output mode later on,
the content of the data latch may now be unknown.
Read-Modify-Write instructions (e.g.,
BCF, BSF,
etc.)
on an I/O port.
A pin actively outputting a high or a low should not be
driven from external devices at the same time in order
to change the level on this pin (“wired OR”, “wired
AND”). The resulting high output currents may damage
the chip.
;Initial GPIO Settings
;GPIO<3:2> Inputs
;GPIO<1:0> Outputs
;
;
GPIO latch
;
----------
BCF
GPIO, 1 ;---- pp01
BCF
GPIO, 0 ;---- pp10
MOVLW 007h;
TRIS
GPIO
;---- pp10
;
GPIO pins
----------
---- pp11
---- pp11
---- pp11
Note 1:
The user may have expected the pin val-
ues to be
---- pp00.
The 2nd
BCF
caused
GP1 to be latched as the pin value (High).
5.4.2
SUCCESSIVE OPERATIONS ON
I/O PORTS
The actual write to an I/O port happens at the end of an
instruction cycle, whereas for reading, the data must be
valid at the beginning of the instruction cycle (Figure 5-2).
Therefore, care must be exercised if a write followed by
a read operation is carried out on the same I/O port. The
sequence of instructions should allow the pin voltage to
stabilize (load dependent) before the next instruction
causes that file to be read into the CPU. Otherwise, the
previous state of that pin may be read into the CPU rather
than the new state. When in doubt, it is better to separate
these instructions with a
NOP
or another instruction not
accessing this I/O port.
DS41239D-page 26
©
2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
