MCP6H91/2/4
3.0
PIN DESCRIPTIONS
PIN FUNCTION TABLE
MCP6H92
SOIC
1
2
3
8
5
6
7
—
—
—
4
—
—
—
—
—
2x3 TDFN
1
2
3
8
5
6
7
—
—
—
4
—
—
—
—
9
MCP6H94
SOIC,
TSSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
—
—
Symbol
V
OUT
, V
OUTA
V
IN
–, V
INA
–
V
IN
+, V
INA
+
V
DD
V
INB
+
V
INB
–
V
OUTB
V
OUTC
V
INC
–
V
INC
+
V
SS
V
IND
+
V
IND
–
V
OUTD
NC
EP
Description
Analog Output (op amp A)
Inverting Input (op amp A)
Non-inverting Input (op amp A)
Positive Power Supply
Non-inverting Input (op amp B)
Inverting Input (op amp B)
Analog Output (op amp B)
Analog Output (op amp C)
Inverting Input (op amp C)
Non-inverting Input (op amp C)
Negative Power Supply
Non-inverting Input (op amp D)
Inverting Input (op amp D)
Analog Output (op amp D)
No Internal Connection
Exposed Thermal Pad (EP);
must be connected to V
SS
.
Descriptions of the pins are listed in
TABLE 3-1:
MCP6H91
SOIC
6
2
3
7
—
—
—
—
—
—
4
—
—
—
1, 5, 8
—
2x3 TDFN
6
2
3
7
—
—
—
—
—
—
4
—
—
—
1, 5, 8
9
3.1
Analog Outputs
3.3
Power Supply Pins
The output pins are low-impedance voltage sources.
3.2
Analog Inputs
The non-inverting and inverting inputs are
high-impedance CMOS inputs with low bias currents.
The positive power supply (V
DD
) is 3.5V to 12V higher
than the negative power supply (V
SS
). For normal
operation, the other pins are at voltages between V
SS
and V
DD
.
Typically, these parts can be used in single-supply
operation or dual-supply operation. Also, V
DD
will need
bypass capacitors.
3.4
Exposed Thermal Pad (EP)
There is an internal electrical connection between the
Exposed Thermal Pad (EP) and the V
SS
pin; they must
be connected to the same potential on the Printed
Circuit Board (PCB).
This pad can be connected to a PCB ground plane to
provide a larger heat sink. This improves the package
thermal resistance (
JA
).
2012 Microchip Technology Inc.
DS25138B-page 15
MICROCHIP [ MICROCHIP TECHNOLOGY ]
