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MCP42010-I/SL 参数 Datasheet PDF下载

MCP42010-I/SL图片预览
型号: MCP42010-I/SL
PDF下载: 下载PDF文件 查看货源
内容描述: 单/双通道数字电位SPI⑩接口 [Single/Dual Digital Potentiometer with SPI⑩ Interface]
分类和应用:
文件页数/大小: 33 页 / 682 K
品牌: MICROCHIP [ MICROCHIP ]
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MCP41XXX/42XXX  
DC CHARACTERISTICS: 100 kVERSION  
Electrical Characteristics: Unless otherwise indicated, V = +2.7V to 5.5V, T = -40°C to +85°C (TSSOP devices are only specified at +25°C and  
DD  
A
+85°C). Typical specifications represent values for V = 5V, V = 0V, V = 0V, T = +25°C.  
DD  
SS  
B
A
Parameters  
Rheostat Mode  
Nominal Resistance  
Rheostat Differential Non-Linearity  
Rheostat Integral Non-Linearity  
Rheostat Tempco  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
T = +25°C (Note 1)  
A
Note 2  
Note 2  
R
70  
-1  
-1  
-1  
100  
±1/4  
±1/4  
800  
125  
175  
130  
+1  
+1  
175  
250  
+1  
1
kΩ  
LSB  
LSB  
ppm/°C  
R-DNL  
R-INL  
R /T  
AB  
Wiper Resistance  
R
R
V
V
= 5.5V, I = 1 mA, code 00h  
W
= 2.7V, I = 1 mA, code 00h  
W
W
W
DD  
DD  
Wiper Current  
I
mA  
%
W
Nominal Resistance Match  
Potentiometer Divider  
Resolution  
R/R  
0.2  
MCP42010 only, P0 to P1;T = +25°C  
A
N
N
DNL  
INL  
8
8
±1/4  
±1/4  
1
-0.25  
-0.35  
+0.25  
+0.35  
+1  
+1  
0
0
+1  
+1  
Bits  
Bits  
LSB  
LSB  
Monotonicity  
Differential Non-Linearity  
Integral Non-Linearity  
Voltage Divider Tempco  
Full-Scale Error  
-1  
-1  
-1  
-1  
0
Note 3  
Note 3  
V /T  
ppm/°C Code 80h  
W
V
V
V
V
LSB  
LSB  
LSB  
LSB  
Code FFh, V = 5V, see Figure 2-25  
DD  
Code FFh, V = 3V, see Figure 2-25  
DD  
Code 00h, V = 5V, see Figure 2-25  
DD  
Code 00h, V = 3V, see Figure 2-25  
DD  
WFSE  
WFSE  
WZSE  
WZSE  
Zero-Scale Error  
0
Resistor Terminals  
Voltage Range  
Capacitance (CA or CB)  
Capacitance  
V
0
11  
5.6  
V
Note 4  
A,B,W  
DD  
pF  
pF  
f =1 MHz, Code = 80h, see Figure 2-30  
f =1 MHz, Code = 80h, see Figure 2-30  
C
W
Dynamic Characteristics (All dynamic characteristics use V = 5V.)  
DD  
Bandwidth -3dB  
BW  
145  
MHz  
µS  
V = 0V, Measured at Code 80h,  
B
Output Load = 30 PF  
= V ,V = 0V, ±1% Error Band, Transition  
Settling Time  
t
18  
V
A
S
DD  
B
from Code 00h to Code 80h, Output Load = 30 pF  
= Open, Code 80h, f =1 kHz  
Resistor Noise Voltage  
Crosstalk  
e
29  
-95  
nV/Hz  
dB  
V
A
NWB  
C
V = V , V = 0V (Note 5)  
A DD B  
T
Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operation.  
Schmitt Trigger High-Level Input Voltage  
Schmitt Trigger Low-Level Input Voltage  
Hysteresis of Schmitt Trigger Inputs  
Low-Level Output Voltage  
V
V
0.7V  
0.05V  
0.3V  
0.40  
V
V
IH  
DD  
IL  
DD  
V
HYS  
DD  
V
V
V
I
I
= 2.1 mA, V = 5V  
DD  
OL  
OL  
High-Level Output Voltage  
V
V
- 0.5  
= -400 µA, V = 5V  
OH DD  
OH  
DD  
Input Leakage Current  
Pin Capacitance (All inputs/outputs)  
Power Requirements  
I
-1  
10  
+1  
µA  
pF  
CS = V , V = V or V , includes V SHDN=0  
DD IN SS DD A  
LI  
C
, C  
V
= 5.0V, T = +25°C, f = 1 MHz  
A c  
IN  
OUT  
DD  
Operating Voltage Range  
Supply Current, Active  
V
2.7  
340  
5.5  
500  
V
µA  
DD  
I
V
= 5.5V, CS = V , f  
= 10 MHz,  
DDA  
DD  
SS SCK  
SO = Open, Code FFh (Note 6)  
Supply Current, Static  
Power Supply Sensitivity  
I
0.01  
0.0015  
0.0015  
1
µA  
%/%  
%/%  
CS, SHDN, RS = V = 5.5V, SO = Open (Note 6)  
DDS  
DD  
PSS  
PSS  
0.0035  
0.0035  
V
V
= 4.5V - 5.5V, V = 4.5V, Code 80h  
A
DD  
DD  
= 2.7V - 3.3V, V = 2.7V, Code 80h  
A
Note 1:  
2:  
V
= V , no connection on wiper.  
AB DD  
Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum  
resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. I = 50 µA for  
W
V
= 3V and I = 400 µA for V = 5V for 10 kversion. See Figure 2-26 for test circuit.  
W DD  
DD  
3:  
4:  
INL and DNL are measured at V with the device configured in the voltage divider or potentiometer mode. V = V and V = 0V. DNL  
W A DD B  
specification limits of ±1 LSB max are specified monotonic operating conditions. See Figure 2-25 for test circuit.  
Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured  
using Figure 2-25.  
5:  
6:  
Measured at V pin where the voltage on the adjacent V pin is swinging full-scale.  
W W  
Supply current is independent of current through the potentiometers.  
DS11195C-page 4  
2003 Microchip Technology Inc.  
 
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