MCP413X/415X/423X/425X
7/8-Bit Single/Dual SPI Digital POT with Volatile Memory
Features
Description
• Single or Dual Resistor Network options
• Potentiometer or Rheostat configuration options
• Resistor Network Resolution
- 7-bit: 128 Resistors (129 Steps)
- 8-bit: 256 Resistors (257 Steps)
• RAB Resistances options of:
- 5 kΩ
The MCP41XX and MCP42XX devices offer a wide
range of product offerings using an SPI interface. This
family of devices support 7-bit and 8-bit resistor
networks, and Potentiometer and Rheostat pinouts.
Package Types (top view)
MCP41X1
MCP41X2
Single Potentiometer
- 10 kΩ
Single Rheostat
- 50 kΩ
CS
SCK
SDI
CS
SCK
SDI/SDO
1
2
3
4
VDD
P0B
P0W
P0A
1
2
3
4
V
DD
8
7
6
5
8
7
6
5
SDO
P0B
P0W
- 100 kΩ
• Zero Scale to Full-Scale Wiper operation
• Low Wiper Resistance: 75Ω (typical)
• Low Tempco:
VSS
V
SS
PDIP, SOIC, MSOP
PDIP, SOIC, MSOP
- Absolute (Rheostat): 50 ppm typical
(0°C to 70°C)
CS
CS
VDD
1
2
8 VDD
1
2
8
7
SCK
SDI/SDO
VSS
P0B SCK
SDO
7
EP
9
EP
9
- Ratiometric (Potentiometer): 15 ppm typical
• SPI Serial Interface (10 MHz, modes 0,0 & 1,1)
- High-Speed Read/Writes to wiper registers
- SDI/SDO multiplexing (MCP41X1 only)
P0W
P0A
SDI
VSS
P0B
3
4
6
5
3
4
6
5
P0W
3x3 DFN*
3x3 DFN*
• Resistor Network Terminal Disconnect Feature
via:
MCP42X1 Dual Potentiometers
- Shutdown pin (SHDN)
- Terminal Control (TCON) Register
• Brown-out reset protection (1.5V typical)
• Serial Interface Inactive current (2.5 uA typical)
• High-Voltage Tolerant Digital Inputs: Up to 12.5V
• Supports Split Rail Applications
16 15 14 13
VDD
SDO
CS
SCK
SDI
14
13
1
2
3
4
5
6
7
SCK
SDI
VSS
VSS
WP
1
12
11
10
9
12 SHDN
NC
2
3
4
EP
17
VSS
WP
11
10
9
P0B
P0W
P0B
P0W
P0A
P1B
P1W
P1A
• Internal weak pull-up on all digital inputs
• Wide Operating Voltage:
8
5
6
7
8
PDIP, SOIC, TSSOP
- 2.7V to 5.5V - Device Characteristics
Specified
4x4 QFN*
MCP42X2 Dual Rheostat
- 1.8V to 5.5V - Device Operation
• Wide Bandwidth (-3 dB) Operation:
- 2 MHz (typical) for 5.0 kΩ device
CS
V
DD
1
2
10
9
VDD
CS
SCK
SDI
10
9
1
2
3
4
5
• Extended temperature range (-40°C to +125°C)
SDO
P0B
P0W
P1W
SCK
SDO
EP
11
8
SDI
VSS
P0B
P0W
P1W
3
4
8
7
6
VSS
7
6
P1B
P1B 5
MSOP, DFN
3x3 DFN*
* Includes Exposed Thermal Pad (EP); see Table 3-1.
© 2008 Microchip Technology Inc.
DS22060B-page 1
MICROCHIP [ MICROCHIP ]
