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MCP3008-I/SL 参数 Datasheet PDF下载

MCP3008-I/SL图片预览
型号: MCP3008-I/SL
PDF下载: 下载PDF文件 查看货源
内容描述: 2.7V 4通道/ 8通道10位与SPI⑩串行接口的A / D转换器 [2.7V 4-Channel/8-Channel 10-Bit A/D Converters with SPI⑩ Serial Interface]
分类和应用: 转换器模数转换器光电二极管PC
文件页数/大小: 34 页 / 577 K
品牌: MICROCHIP [ MICROCHIP ]
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MCP3004/3008  
6.0  
6.1  
APPLICATIONS INFORMATION  
Using the MCP3004/3008 with  
Microcontroller (MCU) SPI Ports  
With most microcontroller SPI ports, it is required to  
send groups of eight bits. It is also required that the  
microcontroller SPI port be configured to clock out data  
on the falling edge of clock and latch data in on the ris-  
ing edge. Because communication with the MCP3004/  
3008 devices may not need multiples of eight clocks, it  
will be necessary to provide more clocks than are  
required. This is usually done by sending ‘leading  
zeros’ before the start bit. As an example, Figure 6-1  
and Figure 6-2 shows how the MCP3004/3008 can be  
interfaced to a MCU with a hardware SPI port.  
Figure 6-1 depicts the operation shown in SPI Mode  
0,0, which requires that the SCLK from the MCU idles  
in the ‘low’ state, while Figure 6-2 shows the similar  
case of SPI Mode 1,1, where the clock idles in the ‘high’  
state.  
As is shown in Figure 6-1, the first byte transmitted to  
the A/D converter contains seven leading zeros before  
the start bit. Arranging the leading zeros this way  
induces the 10 data bits to fall in positions easily manip-  
ulated by the MCU. The MSB is clocked out of the A/D  
converter on the falling edge of clock number 14. Once  
the second eight clocks have been sent to the device,  
the MCU receive buffer will contain five unknown bits  
(the output is at high impedance for the first two  
clocks), the null bit and the highest order 2 bits of the  
conversion. Once the third byte has been sent to the  
device, the receive register will contain the lowest order  
eight bits of the conversion results. Employing this  
method ensures simpler manipulation of the converted  
data.  
Figure 6-2 shows the same thing in SPI Mode 1,1,  
which requires that the clock idles in the high state. As  
with mode 0,0, the A/D converter outputs data on the  
falling edge of the clock and the MCU latches data from  
the A/D converter in on the rising edge of the clock.  
© 2007 Microchip Technology Inc.  
DS21295C-page 17  
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