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MCP2515-I/ST 参数 Datasheet PDF下载

MCP2515-I/ST图片预览
型号: MCP2515-I/ST
PDF下载: 下载PDF文件 查看货源
内容描述: 独立CAN控制器,SPI ™接口 [Stand-Alone CAN Controller With SPI⑩ Interface]
分类和应用: 控制器
文件页数/大小: 84 页 / 993 K
品牌: MICROCHIP [ MICROCHIP ]
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MCP2515  
4.2  
Receive Priority  
4.0  
4.1  
MESSAGE RECEPTION  
Receive Message Buffering  
RXB0, the higher priority buffer, has one mask and two  
message acceptance filters associated with it. The  
received message is applied to the mask and filters for  
RXB0 first.  
The MCP2515 includes two full receive buffers with  
multiple acceptance filters for each. There is also a  
separate Message Assembly Buffer (MAB) that acts as  
a third receive buffer (see Figure 4-2).  
RXB1 is the lower priority buffer, with one mask and  
four acceptance filters associated with it.  
In addition to the message being applied to the RB0  
mask and filters first, the lower number of acceptance  
filters makes the match on RXB0 more restrictive and  
implies a higher priority for that buffer.  
4.1.1  
MESSAGE ASSEMBLY BUFFER  
Of the three receive buffers, the MAB is always  
committed to receiving the next message from the bus.  
The MAB assembles all messages received. These  
messages will be transferred to the RXBn buffers (See  
Register 4-4 to Register 4-9) only if the acceptance  
filter criteria is met.  
When a message is received, bits <3:0> of the  
RXBnCTRL register will indicate the acceptance filter  
number that enabled reception and whether the  
received message is a remote transfer request.  
4.1.2  
RXB0 AND RXB1  
4.2.1  
ROLLOVER  
The remaining two receive buffers, called RXB0 and  
RXB1, can receive a complete message from the  
protocol engine via the MAB. The MCU can access one  
buffer, while the other buffer is available for message  
Additionally, the RXB0CTRL register can be configured  
such that, if RXB0 contains a valid message and  
another valid message is received, an overflow error  
will not occur and the new message will be moved into  
RXB1, regardless of the acceptance criteria of RXB1.  
reception, or for holding  
message.  
a previously received  
4.2.2  
RXM BITS  
Note:  
The entire contents of the MAB is moved  
into the receive buffer once a message is  
accepted. This means that, regardless of  
the type of identifier (standard or  
extended) and the number of data bytes  
received, the entire receive buffer is  
overwritten with the MAB contents.  
Therefore, the contents of all registers in  
the buffer must be assumed to have been  
modified when any message is received.  
The RXBnCTRL.RXM bits set special receive modes.  
Normally, these bits are cleared to 00 to enable  
reception of all valid messages as determined by the  
appropriate acceptance filters. In this case, the  
determination of whether or not to receive standard or  
extended messages is determined by the  
RFXnSIDL.EXIDE bit in the acceptance filter register.  
If the RXBnCTRL.RXM bits are set to 01 or 10, the  
receiver will only accept messages with standard or  
extended identifiers, respectively. If an acceptance  
filter has the RFXnSIDL.EXIDE bit set such that it does  
not correspond with the RXBnCTRL.RXM mode, that  
acceptance filter is rendered useless. These two  
modes of RXBnCTRL.RXM bits can be used in  
systems where it is known that only standard or  
extended messages will be on the bus.  
4.1.3  
RECEIVE FLAGS/INTERRUPTS  
When a message is moved into either of the receive  
buffers, the appropriate CANINTF.RXnIF bit is set. This  
bit must be cleared by the MCU in order to allow a new  
message to be received into the buffer. This bit  
provides a positive lockout to ensure that the MCU has  
finished with the message before the MCP2515  
attempts to load a new message into the receive buffer.  
If the RXBnCTRL.RXM bits are set to 11, the buffer will  
receive all messages, regardless of the values of the  
acceptance filters. Also, if a message has an error  
before the EOF, that portion of the message assem-  
bled in the MAB before the error frame will be loaded  
into the buffer. This mode has some value in debugging  
a CAN system and would not be used in an actual  
system environment.  
If the CANINTE.RXnIE bit is set, an interrupt will be  
generated on the INT pin to indicate that a valid  
message has been received. In addition, the  
associated RXnBF pin will drive low if configured as a  
receive buffer full pin. See Section 4.4 “RX0BF and  
RX1BF Pins” for details.  
© 2005 Microchip Technology Inc.  
Preliminary  
DS21801D-page 23  
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