MCP23018/MCP23S18
TABLE 1-2:
SPI PINOUT DESCRIPTION (MCP23S18)
28L
PDIP/
SOIC
Pin
Name
24L
QFN Type
Pin
Standard Function
GPB0
GPB1
GPB2
GPB3
GPB4
GPB5
GPB6
GPB7
3
24
1
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
4
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
5
2
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
6
3
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
7
4
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
8
5
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
9
6
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
10
7
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
VDD
VSS
CS
11
1
8
P
P
I
Power (high current capable)
Ground (high current capable)
Chip select
23
9
12
13
14
15
16
18
SCK
SI
10
11
12
13
—
I
Serial clock input
I
Serial data input
SO
O
I
Serial data out
RESET
INTB
Hardware reset (must be externally biased)
O
Interrupt output for port B. Can be configured as active high, active low, or open
drain.
INTA
GPA0
GPA1
GPA2
GPA3
GPA4
GPA5
GPA6
GPA7
NC
19
20
21
22
23
24
25
26
27
14
15
16
17
18
19
20
21
22
—
O
Interrupt output for port A. Can be configured as active high, active low, or open
drain.
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled
for interrupt on change, and/or internal pull-up resistor.
2, 17,
28
Not connected
EP
—
25
—
Exposed Thermal Pad (EP). Do not electrically connect, or connect to VSS.
DS22103A-page 6
© 2008 Microchip Technology Inc.
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