Micrel, Inc.
KSZ8041NL/RNL
Pin Description – KSZ8041NL (Continued)
Type(1)
Pin Number Pin Name
Pin Function
20
RXER /
RX_ER /
ISO
Ipd/O
MII Mode:
Receive Error Output /
Receive Error Output /
RMII Mode:
Config Mode:
The pull-up/pull-down value is latched as ISOLATE during
power-up / reset. See “Strapping Options” section for details.
21
INTRP
Opu
Interrupt Output: Programmable Interrupt Output
Register 1Bh is the Interrupt Control/Status Register for programming the interrupt
conditions and reading the interrupt status. Register 1Fh bit 9 sets the interrupt
output to active low (default) or active high.
22
23
TXC
O
I
MII Mode:
MII Mode:
RMII Mode:
Transmit Clock Output
Transmit Enable Input /
Transmit Enable Input
TXEN /
TX_EN
TXD0 /
TXD[0]
MII Mode:
RMII Mode:
MII Mode:
RMII Mode:
MII Mode:
Transmit Data Input[0](4)
Transmit Data Input[0](5)
Transmit Data Input[1](4)
Transmit Data Input[1](5)
Transmit Data Input[2](4)
Transmit Data Input[3](4)
Collision Detect Output /
/
/
24
25
I
I
TXD1 /
TXD[1]
26
27
28
TXD2
TXD3
I
I
/
/
MII Mode:
COL /
Ipd/O
MII Mode:
CONFIG0
Config Mode:
The pull-up/pull-down value is latched as CONFIG0 during
power-up / reset. See “Strapping Options” section for details.
29
CRS /
Ipd/O
MII Mode:
Carrier Sense Output /
CONFIG1
Config Mode:
The pull-up/pull-down value is latched as CONFIG1 during
power-up / reset. See “Strapping Options” section for details.
September 2010
11
M9999-090910-1.4
MICROCHIP [ MICROCHIP ]
