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ATMEGA16M1-15MZ 参数 Datasheet PDF下载

ATMEGA16M1-15MZ图片预览
型号: ATMEGA16M1-15MZ
PDF下载: 下载PDF文件 查看货源
内容描述: [IC MCU 8BIT 16KB FLASH 32QFN]
分类和应用: 微控制器
文件页数/大小: 318 页 / 7595 K
品牌: MICROCHIP [ MICROCHIP ]
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Signal description (internal signals):  
count  
direction  
clear  
Increment or decrement TCNT0 by 1.  
Select between increment and decrement.  
Clear TCNT0 (set all bits to zero).  
clkTn  
top  
Timer/Counter clock, referred to as clkT0 in the following.  
Signalize that TCNT0 has reached maximum value.  
Signalize that TCNT0 has reached minimum value (zero).  
bottom  
Depending of the mode of operation used, the counter is cleared, incremented, or decremented at each timer clock (clkT0).  
clkT0 can be generated from an external or internal clock source, selected by the clock select bits (CS02:0). When no clock  
source is selected (CS02:0 = 0) the timer is stopped. However, the TCNT0 value can be accessed by the CPU, regardless of  
whether clkT0 is present or not. A CPU write overrides (has priority over) all counter clear or count operations.  
The counting sequence is determined by the setting of the WGM01 and WGM00 bits located in the Timer/Counter control  
register (TCCR0A) and the WGM02 bit located in the Timer/Counter control register B (TCCR0B). There are close  
connections between how the counter behaves (counts) and how waveforms are generated on the output compare outputs  
OC0A and OC0B. For more details about advanced counting sequences and waveform generation, see Section 12.6  
“Modes of Operation” on page 81.  
The Timer/Counter overflow flag (TOV0) is set according to the mode of operation selected by the WGM02:0 bits. TOV0 can  
be used for generating a CPU interrupt.  
12.4 Output Compare Unit  
The 8-bit comparator continuously compares TCNT0 with the output compare registers (OCR0A and OCR0B). Whenever  
TCNT0 equals OCR0A or OCR0B, the comparator signals a match. A match will set the output compare flag (OCF0A or  
OCF0B) at the next timer clock cycle. If the corresponding interrupt is enabled, the output compare flag generates an output  
compare interrupt. The output compare flag is automatically cleared when the interrupt is executed. Alternatively, the flag  
can be cleared by software by writing a logical one to its I/O bit location. The waveform generator uses the match signal to  
generate an output according to operating mode set by the WGM02:0 bits and compare output mode (COM0x1:0) bits. The  
max and bottom signals are used by the waveform generator for handling the special cases of the extreme values in some  
modes of operation (Section 12.6 “Modes of Operation” on page 81).  
Figure 12-3 shows a block diagram of the output compare unit.  
Figure 12-3. Output Compare Unit, Block Diagram  
DATA BUS  
OCRnx  
TCNTn  
= (8-bit Comparator)  
OCFnx (Int. Req.)  
OCnx  
Top  
Bottom  
FOCn  
Waveform Generator  
WGMn1:0  
COMnx1:0  
ATmega16/32/64/M1/C1 [DATASHEET]  
79  
7647O–AVR–01/15  
 
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