Table 9-2 summarizes the function of the overriding signals. The pin and port indexes from Figure 9-5 on page 56 are not
shown in the succeeding tables. The overriding signals are generated internally in the modules having the alternate function.
Table 9-2. Generic Description of Overriding Signals for Alternate Functions
Signal Name
Full Name
Description
If this signal is set, the pull-up enable is controlled by the PUOV signal. If
PUOE
Pull-up override enable this signal is cleared, the pull-up is enabled when {DDxn, PORTxn, PUD} =
0b010.
If PUOE is set, the pull-up is enabled/disabled when PUOV is set/cleared,
Pull-up override value
PUOV
DDOE
DDOV
PVOE
regardless of the setting of the DDxn, PORTxn, and PUD register bits.
If this signal is set, the output driver enable is controlled by the DDOV
signal. If this signal is cleared, the output driver is enabled by the DDxn
register bit.
Data direction override
enable
Data direction override If DDOE is set, the output driver is enabled/disabled when DDOV is
value
set/cleared, regardless of the setting of the DDxn register bit.
If this signal is set and the output driver is enabled, the port value is
controlled by the PVOV signal. If PVOE is cleared, and the output driver is
enabled, the port value is controlled by the PORTxn register bit.
Port value override
enable
If PVOE is set, the port value is set to PVOV, regardless of the setting of the
PORTxn register bit.
PVOV
PTOE
Port value override value
Port toggle override
enable
If PTOE is set, the PORTxn register bit is inverted.
If this bit is set, the digital input enable is controlled by the DIEOV signal. If
this signal is cleared, the digital input enable is determined by MCU state
(normal mode, sleep mode).
Digital input enable
override enable
DIEOE
DIEOV
Digital input enable
override value
If DIEOE is set, the digital Input is enabled/disabled when DIEOV is
set/cleared, regardless of the MCU state (normal mode, sleep mode).
This is the digital input to alternate functions. In the figure, the signal is
connected to the output of the schmitt trigger but before the synchronizer.
Unless the digital input is used as a clock source, the module with the
alternate function will use its own synchronizer.
DI
Digital Input
This is the analog input/output to/from alternate functions. The signal is
connected directly to the pad, and can be used bi-directionally.
AIO
Analog input/output
The following subsections shortly describe the alternate functions for each port, and relate the overriding signals to the
alternate function. Refer to the alternate function description for further details.
9.3.1 MCU Control Register – MCUCR
Bit
7
SPIPS
R/W
0
6
–
5
–
4
3
–
2
–
1
IVSEL
R/W
0
0
IVCE
R/W
0
PUD
R/W
0
MCUCR
Read/Write
Initial Value
R
0
R
0
R
0
R
0
• Bit 4 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and PORTxn registers are
configured to enable the pull-ups ({DDxn, PORTxn} = 0b01).
ATmega16/32/64/M1/C1 [DATASHEET]
57
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
