Figure 9-5. Alternate Port Functions(1)
PUOExn
PUOVxn
1
0
PUD
DDOExn
DDOVxn
1
0
Q
Q
D
DDxn
CLR
WDx
RDx
RESET
PVOExn
PVOVxn
1
Pxn
1
0
Q
D
0
PORTxn
PTOExn
WPx
Q
DIEOExn
DIEOVxn
CLR
1
0
RESET
WRx
RRx
RPx
SLEEP
Synchronizer
SET
D
L
Q
Q
D
Q
Q
PINxn
CLR
CLR
CLKI/O
DIxn
AIOxn
PUOExn:
PUOVxn:
DDOExn:
DDOVxn:
PVOExn:
PVOVxn:
DIEOExn:
DIEOVxn:
SLEEP:
Pxn PULL-UP OVERRIDE ENABLE
Pxn PULL-UP OVERRIDE VALUE
Pxn DATA DIRECTION OVERRIDE ENABLE
Pxn DATA DIRECTION OVERRIDE VALUE
Pxn PORT VALUE OVERRIDE ENABLE
Pxn PORT VALUE OVERRIDE VALUE
Pxn DIGITAL INPUT ENABLE OVERRIDE ENABLE
Pxn DIGITAL INPUT ENABLE OVERRIDE VALUE
SLEEP CONTROL
PUD:
WDx:
RDx:
RRx:
WRx:
RPx:
WPx:
CLK:I/O
DIxn:
AIOxn:
PULL-UP DISABLE
WRITE DDRx
READ DDRx
READ PORTx REGISTER
WRITE PORTx
READ PORTx PIN
WRITE PINx
I/O CLOCK
DIGITAL INPUT PIN n ON PORTx
ANALOG INPUT/OUTPUT PIN n ON PORTx
PTOExn:
Pxn, PORT TOGGLE OVERRIDE ENABLE
Note:
1. WRx, WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port. clkI/O, SLEEP, and PUD
are common to all ports. All other signals are unique for each pin.
56
ATmega16/32/64/M1/C1 [DATASHEET]
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
