AT24C256C
Write Operations
operations are limited to writing bytes within a single physical page, regardless of the number of bytes
actually being written. When the incremented word address reaches the page boundary, the address
counter will roll‑over to the beginning of the same page. Nevertheless, creating a roll‑over event should
be avoided as previously loaded data in the page could become unintentionally altered.
Figure 7-2.ꢀPage Write
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
SCL
Device Address Byte
A2 A1
First Word Address Byte
A14 A13 A12 A11 A10 A9 A8
1
0
1
0
A0
0
0
X
0
SDA
MSB
MSB
Start Condition
by Master
ACK
from Slave
ACK
from Slave
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
Second Word Address Byte
Data Word (n)
Data Word (n+x), max of 64 without rollover
A7 A6 A5 A4 A3 A2 A1 A0
MSB
0
D7 D6 D5 D4 D3 D2 D1 D0
MSB
D7 D6 D5 D4 D3 D2 D1 D0
MSB
0
Stop Condition
ACK by Master
from Slave
ACK
from Slave
ACK
from Slave
7.3
Acknowledge Polling
An Acknowledge Polling routine can be implemented to optimize time‑sensitive applications that would
prefer not to wait the fixed maximum write cycle time (tWR). This method allows the application to know
immediately when the Serial EEPROM write cycle has completed, so a subsequent operation can be
started.
Once the internally self‑timed write cycle has started, an Acknowledge Polling routine can be initiated.
This involves repeatedly sending a Start condition followed by a valid device address byte with the R/W
bit set at logic ‘0’. The device will not respond with an ACK while the write cycle is ongoing. Once the
internal write cycle has completed, the EEPROM will respond with an ACK, allowing a new read or write
operation to be immediately initiated. A flowchart has been included below in Figure 7-3 to better illustrate
this technique.
Figure 7-3.ꢀAcknowledge Polling Flowchart
Send
Stop
condition
to initiate the
write cycle
Send Start
condition followed
by a valid
Device Address
byte with R/W = 0
Proceed to
next Read or
Write operation
Did
the device
ACK?
Send any
Write
protocol
YES
NO
7.4
Write Cycle Timing
The length of the self‑timed write cycle (tWR) is defined as the amount of time from the Stop condition that
begins the internal write cycle to the Start condition of the first device address byte, sent to the
DS20006042A-page 19
Datasheet
© 2018 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
