11AA02E48/11AA02E64
TABLE 4-2:
INTERNAL ADDRESS
COUNTER
4.2
Current Address Read (CRRD)
Instruction
Command
Event
Action
The internal address counter featured on the
11AA02EXX maintains the address of the last memory
array location accessed. The CRRD instruction allows
the master to read data back beginning from this
current location. Consequently, no word address is
provided upon issuing this command.
—
Power-on Reset Counter is undefined
READor
WRITE
MAK edge
following each with newly received
Address byte value
Counter is updated
READ,
WRITE, or
CRRD
MAK/NoMAK Counter is
edge following incremented by 1
each data byte
Note that, except for the initial word address, the READ
and CRRD instructions are identical, including the
ability to continue requesting data through the use of
MAKs in order to sequentially read from the array.
Note:
Note:
If, following each data byte in a READ,
WRITE, or CRRD instruction, neither a
MAK nor a NoMAK edge is received
(i.e., if a standby pulse occurs instead),
the internal address counter will not be
incremented.
As with the READ instruction, the CRRD instruction is
terminated by transmitting a NoMAK.
Table 4-2 lists the events upon which the internal
address counter is modified.
During a Write command, once the last
data byte for a page has been loaded, the
internal Address Pointer will rollover to the
beginning of the selected page.
FIGURE 4-2:
CRRD COMMAND SEQUENCE
Device Address
Standby Pulse
Start Header
SCIO
0 1 0 1 0 1 0 1
1 0 1 0 0 0 0 0
Command
Data Byte 1
Data Byte 2
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
SCIO
SCIO
0 0 0 0 0 1 1 0
Data Byte n
7 6 5 4 3 2 1 0
DS20002122D-page 10
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