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11AA02E48_16 参数 Datasheet PDF下载

11AA02E48_16图片预览
型号: 11AA02E48_16
PDF下载: 下载PDF文件 查看货源
内容描述: [2K UNI/O® Serial EEPROMs with EUI-48™ or EUI-64™ Node Identity]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 32 页 / 494 K
品牌: MICROCHIP [ MICROCHIP ]
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11AA02E48/11AA02E64  
The ERAL instruction is ignored if either of the Block  
Protect bits (BP0, BP1) are not 0, meaning 1/4, 1/2 or  
all of the array is protected.  
4.7  
Erase All (ERAL) Instruction  
The ERALinstruction allows the user to write ‘0x00’ to  
the entire memory array with one command. Note that  
the write enable latch (WEL) must first be set by issuing  
the WRENinstruction.  
Note:  
The ERALinstruction must be terminated  
with a NoMAK following the command  
byte. If a NoMAK is not received at this  
point, the command will be considered  
invalid, and the device will go into Idle  
mode without responding with a SAK or  
executing the command.  
Once the write enable latch is set, the user may  
proceed with issuing a ERALinstruction (including the  
header and device address bytes). Immediately after  
the NoMAK bit has been transmitted by the master, the  
internal write cycle is initiated, during which time all  
words of the memory array are written to ‘0x00’.  
FIGURE 4-8:  
ERASE ALL COMMAND SEQUENCE  
Device Address  
Standby Pulse  
Start Header  
SCIO  
0 1 0 1 0 1 0 1  
1 0 1 0 0 0 0 0  
Command  
SCIO  
0 1 1 0 1 1 0 1  
Twc  
The SETALinstruction is ignored if either of the Block  
Protect bits (BP0, BP1) is not ‘0’, meaning 1/4, 1/2 or  
all of the array is protected.  
4.8  
Set All (SETAL) Instruction  
The SETALinstruction allows the user to write ‘0xFF’ to  
the entire memory array with one command. Note that  
the write enable latch (WEL) must first be set by issuing  
the WRENinstruction.  
Note:  
The SETALinstruction must be terminated  
with a NoMAK following the command  
byte. If a NoMAK is not received at this  
point, the command will be considered  
invalid, and the device will go into Idle  
mode without responding with a SAK or  
executing the command.  
Once the write enable latch is set, the user may  
proceed with issuing a SETALinstruction (including the  
header and device address bytes). Immediately after  
the NoMAK bit has been transmitted by the master, the  
internal write cycle is initiated, during which time all  
words of the memory array are written to ‘0xFF’.  
FIGURE 4-9:  
SET ALL COMMAND SEQUENCE  
Device Address  
Standby Pulse  
Start Header  
SCIO  
0 1 0 1 0 1 0 1  
1 0 1 0 0 0 0 0  
Command  
SCIO  
0 1 1 0 0 1 1 1  
Twc  
2008-2016 Microchip Technology Inc.  
DS20002122D-page 15  
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