ML6698
PIN DESCRIPTION (Pin numbers for TQFP package in parentheses)
PIN
NAME
DESCRIPTION
1
(39)
AGND1
TSM<4:0>
Analog ground.
2-6
(40-44)
Transmit data TTL inputs. TSM<4:0> inputs accept TX data symbols. Data
appearing at TSM<4:0> are clocked into the ML6698 on the rising edge of TXC.
7
(1)
PWRDN
Device power down input. A low signal powers down all ciruits of the ML6698, and
dissipates less than 20mA.
8,9,
11,13, 5, 7, 9)
15
(2, 3,
RSM<4:0>
Receive data TTL outputs. RSM<4:0> outputs may be sampled synchronously with
RXC’s rising edge.
10
12
14
16
(4)
DGND1
DVCC1
DGND2
RXC
Digital ground.
(6)
Digital +5V power supply.
Digital ground.
(8)
(10)
Recovered receive symbol clock TTL output. This 25MHz clock is phase-aligned
with the internal 125MHz bit clock recovered from the signal received at TPINP/N
when data is present. Receive data at RSM<4:0> change on the falling edges and
should be sampled on the rising edges of this clock. RXC is phase aligned to TXC
when 100BASE-TX signal is not present at TPINP/N
17
18
19
20
21
22
23
24
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
DGND3
DVCC2
DGND4A
DGND4B
DGND4C
DVCC5
DGND5
SD0
Digital ground.
Digital +5V power supply.
Digital ground.
Digital ground.
Digital ground.
Digital +5V power supply.
Digital ground.
Signal detect TTL output. A high output level indicates 100BASE-TX activity at
TPINP/N with an amplitude exceeding the preset threshold. The signal detect
function is always active independent of the configuration of the SEL100/10 pin.
25
(19)
SEL100/10
Speed select TTL input. Driving this pin low disables 100BASE-TX transmit and
receive functions, and enables the 10BASE-T transmit path from 10BTTXINP/N to
TPOUTP/N. A high signal on SEL100/10 disables the 10BTTXINP/N inputs and enables
100BASE-TX operation.
28
30
(22)
(24)
AVCC3
Analog positive power supply.
RGMSET
Equalizer bias resistor input. An external 9.53ký, 1% resistor connected between
RGMSET and AGND3 sets internal time constants controlling the receive equalizer
transfer function.
31
(25)
RTSET
Transmit level bias resistor input. An external 2.49ký, 1% resistor connected
between RTSET and AGND3 sets a precision constant bias current for the twisted
pair transmit level.
32
(26)
AGND3
Analog ground.
33,34 (27,28)
TPOUTN/P
Transmit twisted pair outputs. This differential current output pair drives MLT-3
waveforms into the network coupling transformer in 100BASE-TX mode, and
10BASE-T or FLP waveforms in 10BASE-T mode.
35
36
(29)
(30)
AGND2
AVCC2
Analog ground.
Analog +5V power supply.
37,38 (31, 32)
TPINN/P
Receive twisted pair inputs. This differential input pair receives 100BASE-TX signals
from the network.
3
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
