ML6691
RECEIVE SECTION
The receive section is responsible for converting received
unaligned symbols into deciphered, aligned and decoded
nibble data on the MII lines, as shown in Figure 2. The
receive symbol input register samples the receive symbol
data from the PMD transceiver and passes the symbol data
onto the decipher process. The cipher lock is restored by
reloading the decipher register after detecting 13
consecutive IDLE symbols which must occur between
packets. The decipher function is then performed by an
exclusive-OR of the output of the decipher register and
the input symbols.
The decipher symbol data are then passed to the symbol
aligner. The symbols are broken into arbitrary five-bit
groups. The alignment is achieved by scanning the code-
bit stream for the JK pair following the idle symbols.
The decoder translates the 4B/5B coded deciphered and
aligned symbols into hex nibbles. The decoder along with
the state machine also examines the symbol stream for
packet framing information. The JK is converted back to
55 and the TR into 00. The decoder also flags invalid
symbol codes and generates the receive error signal. The
state machine also generates the receive data valid signal.
A premature stream termination is caused by the detection
of two IDLE symbols prior to an TR. A linkfail signal will
also terminate the receive operation immediately.
Note, the “Bad SSD” state is not implemented in the
receive state machine of the ML6691.
RECEIVE SYMBOL DATA
(RSM[4:0])
RECEIVE SYMBOL
CLOCK
(RXC)
SYMBOL INPUT
REGISTER
DECIPHER LOCK
SUBSECTION
DECIPHER
LINK
FAIL
SYMBOL ALIGNER
RECEIVING
RECEIVE
STATE MACHINE
DECODER
RECEIVE
RECEIVE
ERROR DATA VALID
(RXDV)
(RXER)
NIBBLE OUTPUT
REGISTER
RECEIVE NIBBLE DATA
(RXD[3:0])
RECEIVE NIBBLE CLOCK
(RXCLK)
Figure 2. Receive Section Block Diagram
7
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
