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ML6401 参数 Datasheet PDF下载

ML6401图片预览
型号: ML6401
PDF下载: 下载PDF文件 查看货源
内容描述: 8位20 MSPS A / D转换器 [8-Bit 20 MSPS A/D Converter]
分类和应用: 转换器
文件页数/大小: 10 页 / 165 K
品牌: MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
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ML6401  
INPUT COUPLING  
internally generated VREF  
(1 volt) is brought to pin 16  
OUT  
The following two figures illustrate two simple means  
of connecting AC and DC coupled signals into the  
ML6401-1.  
(VRTS of 1175), and an internally generated V  
(1.5  
IN-BIAS  
volts) is brought to pin 22 (VRBS of 1175). This allows the  
following four modes of operation:  
CXD1175 REPLACEMENT  
1. CXD1175 — See Figure 3. Connect VRTS to VRT and  
VRBS to VRB. The ladder will have 2 volts across it  
(equal to the full scale range), which varies with supply.  
The 24-pin ML6401-1 is pin compatible with the Sony  
CXD1175 since all features common to both A/D’s share  
common pins. The 24-pin ML6401-1 is not, however, a  
direct replacement for the CXD1175. The architectural  
differences between the two parts result in slightly  
different application circuits only in the area of the  
reference pins.  
ML6401 — With pin 16 connected to pin 17, and pin  
22 connected to pin 23, the A/D will supply internally  
generated bandgap biases, making full scale range 2  
volts and bias (code 128) 1.5 volts. This is a virtual  
drop in for an 1175 with pins 16 and 17 shorted, and  
pins 22 and 23 shorted (0.1 volt bias difference).  
The 1175 brings the top and bottom of the reference  
ladder to external pins (denoted VRT and VRB  
2. CXD1175 — See Figure 4. Leave VRTS and VRBS open,  
and drive VRT and VRB with external voltages. The  
1175 spec allows VRT-VRB to equal from 1.8 volts to  
respectively), and provides two additional pins (VRTS and  
VRBS) which can be used to bias the ladder. There are  
three major differences in the use of the 24-pin ML6401-  
1. First, there is no single resistor ladder which can be  
brought out to users in order to vary gain and offset.  
Second, the 24-pin ML6401 cannot handle full scale  
ranges of VDDA volts. And third, where the 1175  
architecture has two voltages (VRT and VRB) which fix the  
two endpoints of the conversion range (code 255 and  
code 0), the 24-pin ML6401 has one voltage (VREF) which  
affects only full scale range (code 255 – code 0) and one  
VDD volts. This allows users the flexibility to supply  
A
higher quality references (higher precision, lower  
noise), and change the full scale range of the A/D (these  
voltages can be varied to effectively implement a VGA).  
Also, the offset of the A/D can be varied.  
ML6401 — Leave pin 16 and pin 22 open, and drive  
pin 17 and pin 23 with external voltages. The full scale  
range will be 2 × pin 17 volts, and the bias (code 128)  
will occur at pin 23 ±2% volts. The full scale range of  
the A/D must be kept below 4 volts, but the part is only  
specified for full scale range of 2 volts.  
voltage (V –) which affects only bias (code 128). An  
IN  
VIDEO  
INPUT  
VIDEO  
INPUT  
–0.5V to +0.5V  
VDD  
A
V
V
+
IN  
+
VDD  
R
A
A
+0.5V to 2.5V  
S & H  
ADC 1  
V
V
+
IN  
47µF  
+
S & H  
ADC 1  
IN  
0.1µF  
3 × R  
A
IN  
R
R
R
B
L
B
1kΩ  
1kΩ  
75Ω  
R
R
A
A
0.01µF  
10µF  
V
IN-BIAS  
+
1.5V  
1.0V  
R
= 1k TYP  
A
VREF  
VREF  
V
OUT  
IN  
IN-BIAS  
INTERNAL  
REFERENCES  
1.5V  
1.0V  
0.01µF  
VREF  
OUT  
IN  
INTERNAL  
REFERENCES  
VREF  
0.01µF  
GND  
D
GND  
D
Figure 2. DC Coupled Input.  
Figure 1. AC Coupled Input, External Resistors  
Bias the Input.  
6